Uart Interfaces - Quectel EC21 Series Hardware Design

A common mode choke L1 is recommended to be added in series between the module and customer's
MCU in order to suppress EMI spurious transmission. Meanwhile, the 0 Ω resistors (R3 and R4) should
be added in series between the module and the test points to facilitate debugging, and the resistors are
not mounted by default. In order to ensure the integrity of USB data trace signal, L1 & R3 & R4
components must be placed close to the module, and these resistors should be placed close to each
other. The extra stubs of trace must be as short as possible.
To meet USB 2.0 specification, the following principles should be complied with when design the USB
interface.
It is important to route the USB signal traces as differential pairs with total grounding. The

impedance of USB differential trace is 90 Ω.
 Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. Route
the USB differential traces in inner-layer of the PCB, and surround the traces with ground on that
layer and with ground planes above and below.
 Junction capacitance of the ESD protection component might cause influences on USB data traces,
so pay attention to the selection of the component. Typically, the stray capacitance should be less
than 2 pF.
 Keep the ESD protection components to the USB connector as close as possible.

3.11. UART Interfaces

The module provides two UART interfaces: the main UART interface and the debug UART interface. The
following shows their features.
 The main UART interface supports 4800 bps, 9600 bps, 19200 bps, 38400 bps, 57600 bps,
115200 bps, 230400 bps, 460800 bps and 921600 bps baud rates, and the default is 115200 bps. It
also supports RTS and CTS hardware flow control, and can be used for data transmission and AT
command communication.
 The debug UART interface supports 115200 bps baud rate. It is used for Linux console and log
output.
The following tables show the pin definition of the UART interfaces.
Table 12: Pin Definition of Main UART Interface
Pin Name Pin No.
RI 62
DCD 63
EC21_Series_Hardware_Design
I/O Description
DO Ring indication
DO Data carrier detect
LTE Standard Module Series
Comment
1.8 V power domain
If unused, keep them open.
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