ADLINK Technology NuDAQ DAQ-2500 Series User Manual
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ADLINK Technology NuDAQ DAQ-2500 Series User Manual

High performance analog output multi-function cards
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Summary of Contents for ADLINK Technology NuDAQ DAQ-2500 Series

  • Page 1 sales@artisantg.com artisantg.com (217) 352-9330 | Visit our website - Click HERE...
  • Page 2 ® NuDAQ DAQ-2500/PXI-2500 Series High Performance Analog Output Multi-function Cards User's Guide Recycled Paper...
  • Page 4 ® ® ® ® NuDAQ , NuIPC , NuDAM , NuPRO are registered trademarks of ADLINK Technology Inc. Other product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.
  • Page 5 Getting service from ADLINK • Customer Satisfaction is the most important priority for ADLINK Tech Inc. If you need any help or service, please contact us. ADLINK Technology Inc. Web Site http://www.adlinktech.com Sales & Service service@adlinktech.com NuDAQ + USBDAQ nudaq@adlinktech.com NuDAM automation@adlinktech.com...

  • Page 6: Table Of Contents

    Table of Contents Chapter 1 Introduction ............. 1 1.1 Features................1 1.2 Applications ............... 2 1.3 Specifications..............3 1.4 Software Support..............7 1.4.1 Programming Library..............7 ® 1.4.2 D2K-LVIEW: LabVIEW Driver ..........7 1.4.3 D2K-OCX: ActiveX Controls............8 Chapter 2 Installation ..............9 2.1 Contents of Package ............
  • Page 7 4.1.4.4 Bus-mastering DMA Data Transfer........23 4.2 D/A Conversion ..............25 4.2.1 Software Update................28 4.2.2 Waveform Generation ..............28 4.2.2.1 Waveform Generation Timing ..........29 4.2.2.2 Trigger Modes................30 4.2.2.3 Iterative Waveform Generation ..........32 4.2.2.4 Stop Modes................34 4.3 General Purpose Digital I/O..........36 4.4 General Purpose Timer/Counter Operation ......37 4.4.1 Timer/Counter functions basics ..........37 4.4.2 General Purpose Timer/Counter modes ........37...
  • Page 8 4.5.2.4 High-Hysteresis analog trigger condition......45 4.5.2.5 Low-Hysteresis analog trigger condition ....... 45 4.6 Timing Signals ..............46 4.6.1 System Synchronization Interface ...........47 Chapter 5 Calibration .............48 5.1 Auto-calibration ..............49 5.2 Saving Calibration Constants..........49 5.3 Loading Calibration Constants...........49 Chapter 6 Appendix A.............50 6.1 Waveform Generation Demonstration........50 Warranty Policy ...............53 Table of Contents •...
  • Page 9 How to Use This Guide This manual is designed to help you use/understand the DAQ/PXI-2500 high performance analog output multi-function cards SERIES . The manual describes the functions and the operation theory of the DAQ/PXI-2500 SERIES. It is divided into five chapters: Chapter 1, Introduction gives an overview of the product features, ap- plications, and specifications.

  • Page 10: Chapter 1 Introduction

    Introduction DAQ/PXI-2500 SERIES is an advanced analog output card based on the 32-bit PCI/PXI architecture. High performance designs and state-of-the-art technology make this card ideal for waveform generation, industrial proc- ess control, and signal analysis applications in medical, process control, etc.

  • Page 11: Applications

    • D/A FIFO size: 8K samples for DAQ/PXI-2501, and 16K samples for DAQ/PXI-2502 • A/D FIFO size: 2K samples • Versatile trigger sources: software trigger, external digital trigger, ana- log trigger and trigger from System Synchronization Interface (SSI) • A/D Data transfer: software polling & bus-mastering DMA with Scat- ter/Gather •...

  • Page 12: Specifications

    Specifications Analog Output (AO) • Number of channels: 4-CH for DAQ/PXI-2501, 8-CH for DAQ/PXI-2502 • DA converter: AD7945 • Max update rate: 1MS/s • Resolution: 12 bits • FIFO buffer size: 8K for DAQ/PXI-2501, 16K for DAQ/PXI-2502 • Data transfer: Programmed I/O, and bus-mastering DMA with scat- ter/gather •...
  • Page 13 Analog Input (AI) • Number of channels: 4 single-ended for DAQ/PXI-2502, 8 single-ended for DAQ/PXI-2501 • AD converter: LTC1416 • Max sampling rate: 400KS/s • Resolution: 14 bits • FIFO buffer size: 2K samples • Input range: Bipolar: ±10V, unipolar: 0~10V •...
  • Page 14 General Purpose Timer/ Counter (GPTC) • Number of channel: 2 Up/Down Timer/Counters • Resolution: 16 bits • Compatibility: TTL/CMOS • Clock source: Internal or external • Max source frequency: 10MHz Analog Trigger (A.Trig) • Source: external analog trigger (EXTATRIG) • Level: ±10V external •...
  • Page 15 • Power Requirement: +5VDC; 1.6A typical Operating Environment • Ambient temperature: 0 to 55°C • Relative humidity: 10% to 90% non-condensing Storage Environment • Ambient temperature: -20 to 70°C • Relative humidity: 5% to 95% non-condensing 6 • Introduction...

  • Page 16: Software Support

    Software Support ADLINK provides versatile software drivers and packages for users’ dif- ferent approach to building up a system. ADLINK not only provides pro- gramming libraries such as DLL for most Windows based systems, but also ® provide drivers for other software packages such as LabVIEW All software options are included in the ADLINK CD.

  • Page 17: D2K-Ocx: Activex Controls

    1.4.3 D2K-OCX: ActiveX Controls We suggest customers who are familiar with ActiveX controls and VB/VC++ programming use PCIS-OCX ActiveX control component librar- ies for developing applications. PCIS-OCX is designed for Windows 98/NT/2000/XP. For more detailed information about PCIS-OCX, please refer to the user's guide in the CD. (\Manual_PDF\Software\D2K-OCX\D2K-OCX.PDF) The above software drivers are shipped with the board.

  • Page 18: Chapter 2 Installation

    Installation This chapter describes how to install DAQ/PXI-2500 SERIES cards. The contents of the package and unpacking information that you should be aware of are outlined first. DAQ/PXI-2500 SERIES performs an automatic configuration of the IRQ, and port address. Users can use software utility, PCI_SCAN.EXE to read the system configuration.

  • Page 19: Unpacking

    Unpacking Your DAQ/PXI-2500 SERIES card contains electro-static sensitive com- ponents that can be easily be damaged by static electricity. Therefore, the card should be handled on a grounded anti-static mat. The operator should be wearing an anti-static wristband, grounded at the same point as the anti-static mat.

  • Page 20: Daq/Pxi-2500 Series Layout

    DAQ/PXI-2500 SERIES Layout Figure 2.2 PCB Layout of DAQ-2502/2501 Figure 2.3 PCB Layout of PXI-2502/2501 Installation • 11...

  • Page 21: Pci Configuration

    PCI Configuration 1. Plug and Play: As a plug and play component, the board requests an interrupt number via its PCI controller. The system BIOS responds with an interrupt assignment based on the board information and system parameters. These system parameters are determined by the installed drivers and the hardware load seen by the system.

  • Page 22: Chapter 3 Signal Connections

    Signal Connections This chapter describes the connectors of DAQ/PXI-2500 SERIES, and the signal connection between DAQ/PXI-2500 SERIES and external devices. Connectors Pin Assignment DAQ/PXI-2500 SERIES is equipped with two 68-pin VHDCI-type con- nectors (AMP-787254-1). It is used for digital input / output, analog input / output, and timer/counter signals, etc.
  • Page 23 AO_0 35 AGND AO_1 36 AGND AO_2 37 AGND AO_3 38 AGND AOEXTREF_A/AI_0 39 AGND AI_1 40 AGND EXTATRIG/AI_2 41 AGND AOEXTREF_B/AI_3 42 AGND AO_4/AI_4 43 AGND AO_5/AI_5 10 44 AGND AO_6/AI_6 11 45 AGND AO_7/AI_7 12 46 AGND AO_TRIG_OUTA 13 47 EXTWFTRG_A AO_TRIG_OUTB 14 48 EXTWFTRG_B...
  • Page 24 Legend : Pin # Signal Name Refer- Direction Description ence AO_<0..3> AGND Output Voltage output of DA channel <0..3> AOEXTREF_A/ AGND Input External reference for AO AI_0 channel <0..3> / AI input 2 AI_1 AGND Input AI input 0 EXTATRIG/ AGND Input External analog trigger / AI...

  • Page 25: Chapter 4 Operation Theorm

    Operation Theorm The operation theories of the DAQ/PXI-2500 series are described in this chapter. The functions include A/D conversion, D/A conversion, Digital I/O, and General Purpose Counter / Timer. This operation theory will help you understand how to configure and program the DAQ/PXI-2500 series. 16 •...
  • Page 26 Operation Theorem • 17...

  • Page 27: A/D Conversion

    A/D Conversion When using an A/D converter, users should know the properties of the signal to be measured. In addition, users should setup the A/D configura- tions, including scan channels, input range, and polarities. The A/D acquisition is initiated by a trigger signal. The data acquisition will start once the trigger signal matches the trigger conditions.

  • Page 28: Software Polling

    4.1.2 Software Polling This is the easiest way to acquire a single A/D data. The A/D converter performs one conversion whenever the dedicated software command is executed. The software would poll the conversion status and read the A/D data back when it is available. This method is suitable for applications that need to acquire A/D data in real time.

  • Page 29: Scan Timing And Procedure

    4.1.3.1 Scan Timing and Procedure There are 4 counters that need to be specified prior to programmable scans: Counter Width Description Notes Name Scan Interval = Scan Interval, which defines the interval SI_counter 24-bit SI_counter / Time- between each scan. base* Sampling Interval, Sampling Interval =...

  • Page 30: Trigger Mode

    3 Scans, 4 Samples per scan (PSC_Counter=3) (Scan acquisition is performed in ascending sequence for enabled channels) C h0 C h1 C h2 C h2 Trigger C h3 Scan_start AD_conversion Scan_in_progress Acquisition_in_progress Sampling Interval t= Scan Interval T= SI2_COUNTER/TimeBase SI_COUNTER/TimeBase Figure 4.1.1 Timing for Scan NOTE: 1.
  • Page 31 Timebase, external input (AFI-1), or General Purpose Timer/Counter Output 0/1. Post-Trigger or Delay-trigger Acquisition with retrigger Use post-trigger or delay-trigger acquisition with retrigger when users want to perform repeated scans with respect to the repeated triggers. Figure 4.1.4 illustrates an example. Two scans are performed after the first trigger signal, and then wait for the next trigger signal.

  • Page 32: Bus-Mastering Dma Data Transfer

    (NumChan _Counter=4, PSC_Counter=3) Trigger Scan_start AD_conversion Scan_in_progress Acquisition_in_progress Delay until Acquired & stored data Delay_Counter (3 scans) reaches 0 Operation start Figure 4.1.3 Delay trigger (NumChan _Counter=4, SC_Counter=2, retrig_no=3) Trigger Scan_start AD_conversion Scan_in_progress Acquisition_in_progress Acquired & stored data (6 scans) Operation start Figure 4.1.4 Post trigger with retrigger 4.1.4.4...
  • Page 33 The hardware temporarily stores the acquired data in the onboard Data FIFO buffer, then transfers the data to the user-defined DMA buffer in the host PC’s memory. Bus-mastering DMA utilizes the fastest available transfer rate of PCI-bus. Once the analog acquisition operation starts, control returns to your program.

  • Page 34: D/A Conversion

    D/A Conversion DAQ/PXI-2500 series offers flexible and versatile analog output scheme to fit users’ complex field applications. In order to take full advantages of DAQ/PXI-2500 series, we suggest users carefully read the following con- tents. Architecture There are up to 8-channel of 12-bit Digital-to-Analog Converter (DAC) available in the DAQ/PXI-2502.
  • Page 35 Hardware controlled Waveform Generation FIFO is a hardware first-in first-out data queue, which holds temporary digital codes for D/A conversion. When DAQ/PXI-2500 SERIES operates in Waveform Generation mode, the waveform patterns are stored in FIFO, with 8K maximum samples. Waveform patterns larger than 8K are also supported by utilizing bus-mastering DMA transfer supported by PCI con- troller.
  • Page 36 Setting up the DACs Before using the DACs, users should setup the reference source and its polarity. Each DAC has its own reference and polarity settings. For ex- ample; the internal voltage reference of D/A Group A is tied to internal +10V, however, users can still connect external reference thru AOEXTREF (pin 5 on CN2), for example to a +3.3V voltage source.

  • Page 37: Software Update

    DAQ/PXI-2500 SERIES can generate standard and arbitrary functions, continuously or piece-wisely. Appendix A demonstrates possible wave- form patterns generated by DAQ/PXI-2500 SERIES in combination with various counters, clock sources, and voltage references. 4.2.1 Software Update This method is suitable for applications that need to generate D/A output controlled by user programs.

  • Page 38: 4.2.2.1 Waveform Generation Timing

    4.2.2.1 Waveform Generation Timing Six counters interact with the waveform to generate different DAWR timing, thus forming different waveforms. They are described in Table 4.2.3. Counter Name Width Description Note Update Interval, which defines the Update Interval = UI_counter 24-bit update interval be- UI_counter / Time- tween each data...

  • Page 39: 4.2.2.2 Trigger Modes

    NOTE: The maximum D/A update rate is 1MHz. Therefore the minimum setting of UI_counter is 40. 4 update counts, 3 iterations (UC _Counter=4, IC_Counter=3) Trigger UC_Counter=4 DAWR WFG_in_progress Delay until Delay until Delay until DLY1_Counter DLY2_Counter DLY2_Counter reaches 0 reaches 0 reaches 0 DA update_interval t= UI_Counter/Timebase...
  • Page 40 Delay-Trigger Generation Use delay-trigger when users want to delay the waveform generation after the trigger signal. The delay time is determined by DLY1_counter, as shown in Figure 4.2.5. The counter counts down on the rising edges of DLY1_counter clock source after the start trigger signal. When the count reaches zero, DAQ/PXI-2500 series starts to generate the waveform.

  • Page 41: 4.2.2.3 Iterative Waveform Generation

    8 update counts, 1 iteration (UC _Counter=8, IC_Counter=1) Trigger DAWR WFG_in_progress Output Waveform Delay until DLY1_counter reaches 0 Operation start Figure 4.2.5 Delay-Trigger Generation 4 update counts, 2 iterations (UC _Counter=4, IC_Counter=2, Trig_Counter=3 , DLY2_Counter disabled, DLY2_Counter disabled) Trigger Ignored DAWR WFG_in_progress Output Waveform...
  • Page 42 size of a single waveform were larger than that of the FIFO, it needs to be intermittently loaded from the host PC’s memory via DMA, thus PCI bandwidth would be occupied. If the value specified in UC_counter is smaller than the sample size of the waveform patterns, the waveform will be generated piece-wisely.

  • Page 43: 4.2.2.4 Stop Modes

    DLY2_Counter in iterative Waveform Generation To expand the flexibility of Iterative Waveform Generation, DLY2_counter was implemented to separate consecutive waveform generations. The DLY2_counter starts counting down right after a single waveform generation is completed. When it reaches zero, the next iteration of waveform generation will start as shown in Figure 4.2.3.
  • Page 44 4 update counts, infinite iterations (UC _Counter=4, IC_Counter disabled) Trigger DAWR WFG_in_progress Output Waveform Operation start stop trigger Figure 4.2.9 Stop mode I (Assuming the data in the data buffer are 2V, 4V, 2V, 0V) 4 update counts, infinite iterations (UC _Counter=4, IC_Counter disabled) Trigger DAWR...

  • Page 45: General Purpose Digital I/O

    General Purpose Digital I/O DAQ/PXI-2500 SERIES provides 24-line general-purpose digital I/O (GPIO) through a 82C55A chip. The 24-line GPIO are separated into three ports: Port A, Port B and Port C . High nibble (bit[7…4]), and low nibble (bit[3…0]) of each port can be indi- vidually programmed to be either inputs or outputs.

  • Page 46: General Purpose Timer/Counter Operation

    General Purpose Timer/Counter Operation Two independent 16-bit up/down timer/counter are embedded in FPGA firmware for users applications. They have the following features: • Direction of counting can be controlled via hardware or software. • Selectable c ounter clock source from either internal or external clock up to 10MHz.

  • Page 47: Mode1: Simple Gated-Event Counting

    4.4.2.1 Mode1: Simple Gated-Event Counting In this mode, the counter counts the number of pulses on the GPTC_CLK after the software start. Initial count value can be loaded via software. Current count value can be read-back by software at any time. GPTC_GATE is used to enable/disable counting.

  • Page 48: Mode3: Single Pulse-Width Measurement

    4.4.2.3 Mode3: Single Pulse-width Measurement In this mode, the counter counts the pulse-width of the signal on GPTC_GATE in terms of GPTC_CLK. Initial count can be loaded via software. After the software start, the counter counts the number of active edges on GPTC_CLK when GPTC_GATE is active.

  • Page 49: Mode5: Single Triggered Pulse Generation

    4.4.2.5 Mode5: Single Triggered Pulse Generation This function generates a single pulse with programmable delay and pro- grammable pulse-width following an active GPTC_GATE edge. These software programmable parameters can be specified in terms of periods of the GPTC_CLK input. Once the first GPTC_GATE edge triggers the single pulse, GPTC_GATE takes no effect until the software start is re-executed.

  • Page 50: Mode7: Single Triggered Continuous Pulse Generation

    4.4.2.7 Mode7: Single Triggered Continuous Pulse Generation This mode is similar to mode 5, except that the counter generates con- tinuous periodic pulses with programmable pulse interval and pulse-width following the first active edge of GPTC_GATE. Once the first GPTC_GATE edge triggers the counter, GPTC_GATE takes no effect until the software start is re-executed.

  • Page 51: Trigger Sources

    Trigger Sources We provide flexible trigger selections in DAQ/PXI-2500 SERIES. In addi- tion to software trigger, DAQ/PXI-2500 SERIES also supports external analog and digital triggers. Users can configure the trigger source for A/D and D/A processes individually via software. NOTE: A/D and D/A conversion share the same analog trigger. 4.5.1 Software-Trigger This trigger mode does not need any external trigger source.

  • Page 52: Below-Low Analog Trigger Condition

    Trigger Level digital setting Trigger voltage 0xFF 9.92V 0xFE 9.84V 0x81 0.08V 0x80 0x7F -0.08V 0x01 -9.92V 0x00 -10V Table 4.5.1 Analog trigger SRC1(EXTATRIG) ideal transfer characteristic The trigger signal asserts when an analog trigger condition is meet. There five analog trigger conditions...

  • Page 53: Above-High Analog Trigger Condition

    4.5.2.2 Above-High analog trigger condition Figure 4.5.3 shows the above-high analog trigger condition, the trigger signal asserts when the input analog signal is higher than the High_Threshold voltage. The Low_Threshold setting is not used in this trigger condition. Figure 4.5.3 Above-High analog trigger condition 4.5.2.3 Inside-Region analog trigger condition Figure 4.5.4 shows the inside-region analog trigger condition, the trigger...

  • Page 54: High-Hysteresis Analog Trigger Condition

    4.5.2.4 High-Hysteresis analog trigger condition Figure 4.5.5 shows the high-hysteresis analog trigger condition, the trigger signal asserts when the input analog signal level is higher than the High_Threshold voltage, where the hysteresis region is determined by the Low_Threshold voltage. Figure 4.5.5 High-Hysteresis analog trigger condition 4.5.2.5 Low-Hysteresis analog trigger condition Figure 4.5.6 shows the low-hysteresis analog trigger cond ition, the trigger...

  • Page 55: Timing Signals

    Timing Signals In order to meet the requirements for user-specific timing or synchronizing multiple boards, DAQ/PXI-2500 SERIES provides a flexible interface for connecting timing signals with external circuitry or other boards. The DAQ timing of the DAQ/PXI-2500 SERIES is composed of a bunch of counters and trigger signals in the FPGA on board.

  • Page 56: System Synchronization Interface

    4.6.1 System Synchronization Interface SSI uses bi-directional I/O to provide flexible connections between boards. You can choose each of the 7 timing signals and which board to be the SSI master. The SSI master can drive the timing signals of the slaves. Users can thus achieve better synchronization between boards.

  • Page 57: Chapter 5 Calibration

    Calibration This chapter introduces the calibration process to minimize AD meas- urement errors and DA output errors. DAQ/PXI-2500 SERIES is factory calibrated before shipment. The on- board high precision band-gap voltage reference together with TrimDAC compensates for unwanted offsets and gain errors, caused by environment variation or component aging.

  • Page 58: Auto-Calibration

    Auto-calibration The auto-calibration feature of DAQ/PXI-2500 SERIES facilitates users completing a calibration process, without the necessities for any external voltage references or measurement devices. The on-board auto-calibration circuitry is composed of a precision band-gap voltage reference, an ADC and a TrimDAC. TrimDAC is a multi-channel DAC that generates DC offsets that counteract the offsets from the main DACs.

  • Page 59: Chapter 6

    Appendix A Waveform Generation Demonstration Combined with 6 counters, selectable trigger sources, external reference sources, and time base, DAQ/PXI-2500 SERIES provides the capabilities to generate complex waveforms. Various modes shown below can be mixed together to generate waveforms that are even more complex. Although users can always load a new waveform to generate any desired waveform, we suggest using hardware capabilities to maximize both effi- ciency and flexibility.
  • Page 60 Standard Function w. Frequency Variant Users can alter the frequency of gener- ated waveforms by driving DAWR from external signal via AF0/AF1/SSI. The resultant updating rate should be kept within 1MHz. In this demo, iterative generation is used. Iterative Generation w. Intermediate Space Utilize DLY2_counter to separate con- secutive waveform generations in itera- tive generation mode.
  • Page 61 By feeding AFI0/AFI1 with PWM source, pulse train from VCO, or any time-varying digital signal, DAQ/PXI-2500 SERIES is capable of generating frequency modulated (FM) waveform. Since all four channels are synchronized in a D/A group, precise quadrature waveform generation is guarantied, provided the waveform are shifted 90-degree for the other channel.

  • Page 62: Warranty Policy

    Warranty Policy Thank you for choosing ADLINK. To understand your rights and enjoy all the after-sales services we offer, please read the following carefully. Before using ADLINK’s products, please read the user manual and follow the instructions exactly. When sending in damaged products for repair, please attach an RMA application form.
  • Page 63 To ensure the speed and quality of product repair, please download application form from company website www.adlinktech.com . Damaged products with RMA forms at- tached receive priority. For further questions, please contact our FAE staff. ADLINK: service@adlinktech.com Test & Measurement Product Segment: NuDAQ@adlinktech.com Automation Product Segment: Automation@adlinktech.com Computer &...

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