PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
SCL
Digital Input (Open Drain). SMBus serial clock input. Requires SMBus pull-up.
2
GND
Ground Pin for the ADT7475.
3
V
Power Supply. V
CC
4
TACH3
Digital Input (Open Drain). Fan tachometer input to measure speed of Fan 3.
5
PWM2/
Digital Output (Open Drain). Requires 10 kΩ typical pull-up. Pulse-width modulated output to control Fan 2
speed. Can be configured as a high or low frequency drive.
SMBALERT
Digital Output (Open Drain). This pin can be reconfigured as an SMBALERT interrupt output to signal out-of-limit
conditions.
6
TACH1
Digital Input (Open Drain). Fan tachometer input to measure speed of Fan 1.
7
TACH2
Digital Input (Open Drain). Fan tachometer input to measure speed of Fan 2.
8
PWM3
Digital I/O (Open Drain). Pulse-width modulated output to control the speed of Fan 3 and Fan 4. Requires 10 kΩ
typical pull-up. Can be configured as a high or low frequency drive.
9
TACH4
Digital Input (Open Drain). Fan tachometer input to measure speed of Fan 4.
Digital I/O (Open Drain). Alternatively, the pin can be reconfigured as a bidirectional THERM pin, which can be
THERM
used to time and monitor assertions on the THERM input. For example, the pin can be connected to the
PROCHOT output of an Intel Pentium 4 processor or to the output of a trip point temperature sensor. This pin can
be used as an output to signal overtemperature conditions.
SMBALERT
Digital Output (Open Drain). This pin can be reconfigured as an SMBALERT interrupt output to signal out-of-limit
conditions.
GPIO
General-Purpose Open Drain Digital I/O.
10
D2−
Cathode Connection to Second Thermal Diode.
11
D2+
Anode Connection to Second Thermal Diode.
12
D1−
Cathode Connection to First Thermal Diode.
13
D1+
Anode Connection to First Thermal Diode.
14
V
Analog Input. Monitors processor core voltage (0 V − 3 V).
CCP
15
PWM1
Digital Output (Open Drain). Pulse-width modulated output to control Fan 1 speed. Requires 10 kΩ typical
pull-up.
XTO
Also functions as the output from the XNOR tree in XNOR test mode.
16
SDA
Digital I/O (Open Drain). SMBus bidirectional serial data. Requires 10 kΩ typical pull-up.
SCL
1
GND
2
V
3
CC
ADT7475
TACH3
4
TOP VIEW
PWM2/SMBALERT
(Not to Scale)
5
TACH1
6
TACH2
7
PWM3
8
Figure 3. Pin Configuration
is also monitored through this pin.
CC
Rev. 0 | Page 6 of 64
SDA
16
PWM1/XTO
15
V
14
CCP
D1+
13
D1–
12
D2+
11
D2–
10
9
TACH4/THERM/GPIO/
SMBALERT
ADT7475
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