Configuring the THERM Behavior
1.
Configure the relevant pin as the THERM timer input.
Setting Bit 1 ( THERM timer enable) of Configuration
Register 3 (Reg. 0x78) enables the THERM timer
monitoring functionality. This is disabled on Pin 9 by
default.
Setting Bit 0 and Bit 1 (PIN9FUNC) of Configuration
Register 4 (Reg. 0x7D) enables THERM timer/output
functionality on Pin 9 (Bit 1 of Configuration
Register 3, THERM , must also be set). Pin 9 can also
be used as TACH4.
2.
Select the desired fan behavior for THERM timer
events.
Assuming that the fans are running, setting Bit 2
(BOOST bit) of Configuration Register 3 (Reg. 0x78)
causes all fans to run at 100% duty cycle whenever
THERM gets asserted. This allows fail-safe system
cooling. If this bit is 0, the fans run at their current
settings and are not affected by THERM events. If the
fans are not already running when THERM is
asserted, the fans do not run to full speed.
3.
Select whether THERM timer events should generate
SMBALERT interrupts.
Bit 5 (F4P) of Mask Register 2 (Reg. 0x75), when set,
masks out SMBALERT s when the THERM timer limit
value gets exceeded. This bit should be cleared if
SMBALERT s based on THERM events are required.
4.
Select a suitable THERM limit value.
This value determines whether an SMBALERT is
generated on the first THERM assertion, or only if a
cumulative THERM assertion time limit is exceeded.
A value of 0x00 causes an SMBALERT to be generated
on the first THERM assertion.
5.
Select a THERM monitoring time.
This value specifies how often OS or BIOS level
software checks the THERM timer. For example,
BIOS could read the THERM timer once an hour to
determine the cumulative THERM assertion time.
If, for example, the total THERM assertion time is
<22.76 ms in Hour 1, >182.08 ms in Hour 2, and
>5.825 s in Hour 3, this can indicate that system
performance is degrading significantly because
THERM is asserting more frequently on an hourly
basis.
Alternatively, OS- or BIOS-level software can timestamp
when the system is powered on. If an SMBALERT is gen-
erated due to the THERM timer limit being exceeded,
another timestamp can be taken. The difference in time
can be calculated for a fixed THERM timer limit time.
For example, if it takes one week for a THERM timer limit
of 2.914 sec to be exceeded and the next time it takes only
1 hour, then this is an indication of a serious degradation
in system performance.
Configuring the THERM Pin as an Output
In addition to monitoring THERM as an input, the ADT7475
can optionally drive THERM low as an output. In cases where
PROCHOT is bidirectional, THERM can be used to throttle the
processor by asserting PROCHOT . The user can preprogram
system-critical thermal limits. If the temperature exceeds a
thermal limit by 0.25°C, THERM asserts low. If the tempera-
ture is still above the thermal limit on the next monitoring
cycle, THERM stays low. THERM remains asserted low until
the temperature is equal to or below the thermal limit. Because
the temperature for that channel is measured only once for
every monitoring cycle, after THERM asserts it is guaranteed
to remain low for at least one monitoring cycle.
The THERM pin can be configured to assert low, if the Remote 1,
local, or Remote 2 THERM temperature limits are exceeded
by 0.25°C. The THERM temperature limit registers are at
Registers 0x6A, 0x6B, and 0x6C, respectively. Setting Bit 3 of
Registers 0x5F, 0x60, and 0x61 enables the THERM output
feature for the Remote 1, local, and Remote 2 temperature
channels, respectively. Figure 33 shows how the THERM pin
asserts low as an output in the event of a critical
overtemperature.
THERM LIMIT
0.25°C
THERM LIMIT
TEMP
THERM
Figure 30. Asserting THERM as an Output, Based on Tripping
An alternative method of disabling THERM is to program the
THERM temperature limit to −64°C or less in Offset 64 mode,
or −128°C or less in twos complement mode; that is, for
THERM temperature limit values less than −63°C or −128°C,
respectively, THERM is disabled.
Rev. 0 | Page 25 of 64
ADT7475
MONITORING
CYCLE
THERM Limits
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