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Bill of Materials, PCB Layout, and Schematics
7.2
PCB Layout
Figure 20
through
NOTE: Board layouts are not to scale. These figures are intended to show how the board is laid out;
they are not intended to be used for manufacturing ADS7043EVM PCBs.
20
ADS7043EVM-PDK
Figure 23
show the PCB layouts for the ADS7043EVM.
Figure 20. ADS7043EVM PCB: Top Layer (L1)
Figure 21. ADS7043EVM PCB: GND Layer (L2)
Copyright © 2014, Texas Instruments Incorporated
www.ti.com
SBAU241 – November 2014
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