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7.3
4 × 4 External Single-ended (4XS) Application Circuit
VDD_EB
FL1
2
1
BLM18HE152SN1
C2
DNM
VDDS
nRESET
Copyright © 2015–2016, Texas Instruments Incorporated
VDDS
VDDS Decoupling Capacitors
Pin 11
Pin 27
Pin 19
C3
C4
100 nF
100 nF
U1
DIO_0
8
DIO_0
DIO_1
9
DIO_1
DIO_2
10
DIO_2
VDDS_DCDC
DIO_3/JTAG_TDO
15
DIO_3
DIO_4/JTAG_TDI
16
DIO_4
DIO_5
22
DIO_5
DIO_6
23
DIO_6
DIO_7
R1
24
DIO_7
100 k
DIO_8
25
DIO_8
DIO_9
26
DIO_9
nRESET
21
RESET_N
JTAG_TCK
14
JTAG_TCKC
JTAG_TMS
13
JTAG_TMSC
C20
12
100 nF
DCOUPL
3
VSS
7
VSS
C19
17
VSS
20
VSS
1 µF
29
VSS
33
EGP
CC26XX_4X4
Figure 7-5. 4 × 4 External Single-ended (4XS) Application Circuit
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DCDC_SW
1
10 H
C5
C6
10 F
µ
100 nF
Place L1 and
C8 close to pin 18
VDDS
VDDR
27
RF_N used for RX biasing.
VDDS
11
VDDS2
L21 may be removed at the
19
28
VDDR
cost of 1 dB degraded
32
VDDR
sensitivity
18
DCDC_SW
DCDC_SW
L21
4
1
2
RX/TX
2
15 nH
RF_N
1
RF_P
RF_P
31
X24M_P
X24M_P
X24M_N
30
X24M_N
6
X32K_Q2
5
X32K_Q1
Y 2
Y 1
24 MHz
32.768 kHz
1
C22
C17
C18
2
12 pF
12 pF
DNM
CC2650
SWRS158B – FEBRUARY 2015 – REVISED JULY 2016
VDDR
VDDR Decoupling Capacitors
L1
Pin 28
Pin 32
2
µ
C8
C9
10 F
µ
100 nF
C14
L12
1
2
2 nH
C12
C13
12 pF
1.2 pF
1.2 pF
3
C23
4
DNM
Copyright © 2016, Texas Instruments Incorporated
Application, Implementation, and Layout
CC2650
C10
C16
100 nF
DNM
50-
Antenna
45
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