Compression - Allied Telesis AR Series Hardware Reference Manual

Hardware Reference
C613-03031-01 REV E
Figure 28: Location of main components on the AT-AR061 ECPAC card.
Holes for PAC fasteners

Compression

PAC-based compression has the following features:
Local 32-bit processor for high speed control and data transfer.
Dedicated high performance 32-bit compression hardware.
High compression ratio Lempel-Ziv algorithm in hardware.
2 MBytes of history memory.
Support for up to 127 compression channels.
Compression and decompression operations are performed by a 32-bit data
compression coprocessor specifically designed for high-performance Lempel-
Ziv compression applications. The 2 MBytes of history memory allows up to
127 individual data links to use compression concurrently, enabling PACs to
provide compression for complicated network architectures. Figure 29 on page
62 shows typical compression ratios achieved by a PAC for a representative set
of file types.
PAC Connector
Hole for PAC fastner
61
PAC