Vrm Per-Phase Current Limit Capability; Psys Slope; Psys Offset; Psys Pmax Power - Supermicro C7Z170-SQ User Manual

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VRM Per-Phase Current Limit Capability

Use this feature to set the CPU integrated voltage regulator when un-
der extreme high load for VRM per-phase current limit. The options are
100%, 110%, 120%, 130%, 140%, 150%, 160%, 170%, and 180%.

PSYS Slope

PSYS Slope is defined in 1/100 increments and uses the BIOS VR mailbox
command 0x9. Valid range is 0-200. For example, enter 125 for a 1.25
slope. Enter 0 for AUTO.

PSYS Offset

PSYS Offset is defined in 1/4 increments and uses the BIOS VR mailbox
command 0x9. For example, enter 100 for a 25 offset. Valid range is
0-255.

PSYS PMax Power

The value is defined in 1/8 Watt increments and uses the BIOS VR mail-
box command 0xB. For example, enter 1000 for a 125 Watt PMax value.
Valid range is 0-8192. Enter 0 for AUTO.

Acoustic Noise Settings

Acoustic Noise Mitigation

Select Enable to help mitigate acoustic noise on certain SKUs when the
CPU is in deeper C-State. The options are Disabled and Enabled.
When the above is set to Enabled, the following can be configured:
IA VR Domain
Disable Fast PKG C State Ramp for IA Domain
Select False to leave Fast ramp enabled during deeper C-States. Se-
lecting True will disable Fast ramp during deeper C-States. The options
are FALSE and TRUE.
Slow Slew Rate for IA Domain
This feature sets the VR IA Slew Rate for Deep Package C-State ramp
time. Slow slew rate equals Fast divided by the number 2, 4, 8, or
16. This feature is used to help reduce acoustic noise. The options are
Fast/2, Fast/4, Fast/8, and Fast/16.
4-27
Chapter 4: AMI BIOS

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