Mipi Csi Interface; Figure 9 - Sbc General Purpose Keys (Sw1,Sw4 & Sw5); Figure 10 - Sbc Mipi Csi Connectors (Csi0, Csi2) - Arrow einfochips eragon 660 Hardware Referance Manual

Hardware Reference Manual
Power on switch
Volume Up Switch
Fast Boot
Switch/VOL_DOWN
Switch
Figure 9 – SBC General Purpose Keys (SW1,SW4 & SW5)
6.3.4

MIPI CSI Interface

ERAGON660 kit supports three 4 Lane MIPI CSI ports; however only two can work concurrently. Below
are its features,

Three 4 Lane CSI Ports at 2.1 Gbps per lane data rate.

Dual 14-bit image signal processing (ISP): 16 +16 MP, 540 MHz each; 24MP30 ZSL with dual
ISP; 16 MP 30 ZSL with a single ISP

There are two dedicated I2C (CCI0 & CCI1) signals along with reset and power down signals for
camera interface.

CSI0 and CSI2 connector is on SBC and CSI2 connector on IO Card.
Version 1.0
Figure 10 – SBC MIPI CSI connectors (CSI0, CSI2)
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