Pinout Information For Max 10 Fpga I/O; Analog Devices External Peripherals; Accelerometer, 3-Axis, Spi Interface (Adxl362); Dac, 12-Bit, Spi Interface (Ad5681) - Arrow BeMicro Max 10 Getting Started User Manual

Fpga evaluation kit
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Pinout Information for MAX 10 FPGA I/O

Pinout Information for MAX 10 FPGA I/O
Pinout Information for MAX 10 FPGA I/O
3. PINOUT INFORMATION FOR MAX 10 FPGA I/O
3. PINOUT INFORMATION FOR MAX 10 FPGA I/O
3. PINOUT INFORMATION FOR MAX 10 FPGA I/O
The BeMicro Max 10 contains a variety of external peripheral devices and expansion headers connected to the MAX
The BeMicro Max 10 contains a variety of external peripheral devices and expansion headers connected to the MAX
The BeMicro Max 10 contains a variety of external peripheral devices and expansion headers connected to the MAX
10 FPGA's configurable I/O pins. The details of the board circuitry and these connections can be found in the
10 FPGA's configurable I/O pins. The details of the board circuitry and these connections can be found in the
10 FPGA's configurable I/O pins. The details of the board circuitry and these connections can be found in the
schematic files included in the MAX 10 FPGA files. (Refer to Section 2.3 for details on extracting these files.) This
schematic files included in the MAX 10 FPGA files. (Refer to Section 2.3 for details on extracting these files.) This
schematic files included in the MAX 10 FPGA files. (Refer to Section 2.3 for details on extracting these files.) This
section presents the information in the schematic organized into pinout tables by peripheral. While the schematic
section presents the information in the schematic organized into pinout tables by peripheral. While the schematic
section presents the information in the schematic organized into pinout tables by peripheral. While the schematic
provides a board level view of all the pins for a given connector or peripherals, the tables in this section focus on the
provides a board level view of all the pins for a given connector or peripherals, the tables in this section focus on the
provides a board level view of all the pins for a given connector or peripherals, the tables in this section focus on the
FPGA signals needed for FPGA pin assignment and compilation.
FPGA signals needed for FPGA pin assignment and compilation.
FPGA signals needed for FPGA pin assignment and compilation.
The "Signal Name" column in the tables throughout this section indicates the naming of the signal in the Quartus
The "Signal Name" column in the tables throughout this section indicates the naming of the signal in the Quartus
The "Signal Name" column in the tables throughout this section indicates the naming of the signal in the Quartus
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projects' QSF
projects' QSF
projects' QSF
file provided in the various FPGA projects
file provided in the various FPGA projects
file provided in the various FPGA projects

3.1 Analog Devices External Peripherals

3.1 Analog Devices External Peripherals
3.1 Analog Devices External Peripherals

3.1.1 Accelerometer, 3-Axis, SPI interface (ADXL362)

3.1.1 Accelerometer, 3-Axis, SPI interface (ADXL362)
3.1.1 Accelerometer, 3-Axis, SPI interface (ADXL362)
Signal Name
Signal Name
Signal Name
MAX 10 Pin
MAX 10 Pin
MAX 10 Pin
ADXL362_CS
ADXL362_CS
ADXL362_CS
L14
L14
L14
ADXL362_INT1
ADXL362_INT1
ADXL362_INT1
M15
M15
M15
ADXL362_INT2
ADXL362_INT2
ADXL362_INT2
M14
M14
M14
ADXL362_MISO
ADXL362_MISO
ADXL362_MISO
L18
L18
L18
ADXL362_MOSI
ADXL362_MOSI
ADXL362_MOSI
L19
L19
L19
ADXL362_SCLK
ADXL362_SCLK
ADXL362_SCLK
M18
M18
M18

3.1.2 DAC, 12-bit, SPI interface (AD5681)

3.1.2 DAC, 12-bit, SPI interface (AD5681)
3.1.2 DAC, 12-bit, SPI interface (AD5681)
Signal Name
Signal Name
Signal Name
MAX 10 Pin
MAX 10 Pin
MAX 10 Pin
AD5681R_LDACn
AD5681R_LDACn
AD5681R_LDACn
N18
N18
N18
AD5681R_RSTn
AD5681R_RSTn
AD5681R_RSTn
L15
L15
L15
AD5681R_SCL
AD5681R_SCL
AD5681R_SCL
G17
G17
G17
AD5681R_SDA
AD5681R_SDA
AD5681R_SDA
H17
H17
H17
AD5681R_SYNCn N19
AD5681R_SYNCn N19
AD5681R_SYNCn N19
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A "QSF file" is a Quartus Settings File, a file with extension of *.qsf in which Quartus stores all project settings, including device
A "QSF file" is a Quartus Settings File, a file with extension of *.qsf in which Quartus stores all project settings, including device
A "QSF file" is a Quartus Settings File, a file with extension of *.qsf in which Quartus stores all project settings, including device
pin assignments.
pin assignments.
pin assignments.
BeMicro Max 10 Getting Started User Guide, Version 14.0
BeMicro Max 10 Getting Started User Guide, Version 14.0
BeMicro Max 10 Getting Started User Guide, Version 14.0
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