BCM MX852-C6 User Manual page 24

(12) LCD Panel and Inverter Header (40-pin): LVDS (CN15)
Signal name Description
CLKB+, CLKA+ Positive LVDS differential clock2 & clock1
CLKB-, CLKA- Negative LVDS differential closk2 & clock1
YA[ ]+, YB[ ]+[0:3] Positive LVDS differential data
YA[ ]- , YB[ ]- [0:3] Negative LVDS differential data
VCC_LCD LCD backlight voltage +3.3V, +5V (See JP6)
GND Ground
+12 +12V
LCD_BLK Enable backlight signal.
(13) LCD Panel Power Setting (JP2)
(14) LAN LED Header (CN24)
40
39
1 3
JP6
1-2 closed 3.3V (Default)
LCD Power Setting
Signal
Link_LED
ACT_LED
CN24
2
1
19
LCD Panel Connector
HIROSE DF-13-40DP-1.25V
Signal Pin
NC 1
GND 3
YA0- 5
YA0+ 7
GND 9
YA2- 11
YA2+ 13
2
GND 15
YA3- 17
1
YA3+ 19
GND 21
YB1- 23
YB1+ 25
GND 27
CLKB- 29
CLKB+ 31
NC 33
NC 35
NC 37
LCD_BKL 39
1
JP6
2-3 closed
Pin# Pin# Signal
1 2 VCC_3V
3 4 VCC_3V
Signal
2 NC
4 GND
6 YA1-
8 YA1+
10 GND
12 CLKA-
14 CLKA+
16 GND
18 YB0-
20 YB0+
22 GND
24 YB2-
26 YB2+
28 GND
32 YB3-
32 YB3+
34 +12V
36 +12V
38 VCC_LCD
40 VCC_LCD
3
5V