Sony DNW-A75 Maintenance Manual page 236

(6) System Control System and Servo System (SS-83 Board)
System control and servo control are performed on the SS-83 board. Two main CPUs (SYS1 CPU and
SYS2 CPU) for system control and one main CPU (servo CPU) for servo control are mounted on the SS-
83 board. Moreover, drum MPU and DT MPU are mounted on the SS-83 board.
System control
SYS1 CPU uses RISC CPU, and the operating clock is 40 MHz.
SYS1 CPU performs the following processing.
. Remote interface processing
(REMOTE1-IN/OUT (9-pin), PARALLEL I/O (50-pin), RS-232C, and VIDEO CONTROL connec-
tors)
. Processes communications with KY MPU on KY-438 board.
(for JOG/Search dial I/F and Lower control panel I/F)
. Processes communications with FP MPU on FP-117 board.
(for Sub control panel I/F and Upper control panel I/F)
. Processes communications with SYS2 CPU.
. Controls character superimposition.
Like SYS1 CPU, SYS2 CPU also uses RISC CPU. The operating clock is 40 MHz.
SYS2 CPU performs the following processing.
. Controls LSIs, DSP, and PIOs on VPR-47, APR-40, DEC-110, SDI-41, DPR-118, and DPR-119
(BKNW-118) boards.
. Processes communications with MPUs on EQ-75, SDI-41, DM-89, and TBC-23A boards.
. Controls the fluorescent (FL) indicator (audio level meter).
. Processes communications with SYS1 CPU.
. Processes communications with servo CPU.
. Time code (TC) processing
. Processes communications with SYS3 CPU on DPR-150 (BKNW-124) board.
Servo control
Servo CPU uses 16-bit CPU. The operating clock is 20 MHz.
Servo CPU performs the following processing.
. Controls various motor drivers (capstan, reels, and drum).
. Detects each FG signal, PG signal, and sensor state.
. Generates each mode signal and timing pulse corresponding to the tape transport state.
. Controls the addresses of each JOG memory on the VPR-47 board and the DPR-118 board.
. Processes communications with drum MPU (head select and flying erase control MPU).
. Processes communications with DT MPU (bimorph (DT) heads control MPU for analog Betacam PB
operation).
Each communication between SYS1 CPU and SYS2 CPU, SYS2 CPU and servo CPU, and servo CPU
and DT MPU is performed via the dual port RAM.
C-6
DNW-A75/A75P