Sony TA-ZH1ES Service Manual page 81

DIGITAL BOARD IC700 EP4CE55U19I7N (FPGA)
Pin No. Pin Name
A1 GND
A2 VCCIO8
IO/DIFFIO_T5N/
A3
DATA10
A4 IO/DIFFIO_T8N
IO/DIFFIO_T11P/
A5
DATA5
IO/DIFFIO_T15N/
A6
PADD19
IO/DIFFIO_T16N/
A7
PADD18
IO/DIFFIO_T17N/
A8
DATA2
IO/DIFFIO_T20N/
A9
PADD16
A10 IO/DIFFIO_T21N
A11 CLK10/DIFFCLK_4N
A12 CLK8/DIFFCLK_5N
IO/DIFFIO_T24N/
A13
PADD11
IO/DIFFIO_T25N/
A14
PADD9
IO/DIFFIO_T27N/
A15
PADD5
A16 IO/DIFFIO_T30N
IO/DIFFIO_T31N/
A17
PADD1
A18 IO/DIFFIO_T34N
A19 IO/RDN4
A20 IO/PLL2_CLKOUTN
A21 VCCIO7
A22 GND
B1 IO/DIFFIO_L2N
B2 IO/DIFFIO_L2P
IO/DIFFIO_T5P/
B3
DATA11
IO/DIFFIO_T8P/
B4
DATA8
B5 IO/VREFB8N1
IO/DIFFIO_T15P/
B6
DATA15
IO/DIFFIO_T16P/
B7
DATA4
IO/DIFFIO_T17P/
B8
DATA3
IO/DIFFIO_T20P/
B9
PADD17
IO/DIFFIO_T21P/
B10
PADD15
B11 CLK11/DIFFCLK_4P
B12 CLK9/DIFFCLK_5P
IO/DIFFIO_T24P/
B13
PADD12
IO/DIFFIO_T25P/
B14
PADD10
IO/DIFFIO_T27P/
B15
PADD6
B16 IO/DIFFIO_T30P
IO/DIFFIO_T31P/
B17
PADD2
IO/DIFFIO_T34P/
B18
PADD0
I/O
- Ground terminal
- Power supply terminal (+3.3V)
- Not used
- Not used
- Not used
I DSD data (for R-ch) input from the USB controller
- Not used
I L/R sampling clock signal (LRCK) input from the USB controller
I PCM data input from the USB controller
I DSD data (for L-ch) input from the USB controller
I Bit clock signal (BCK) input from the USB controller
I Bit clock and DSD clock signal (BCK) input from the A/D converter
- Not used
I L/R sampling clock signal (LRCK) input from the A/D converter
I DSD data (for L-ch) input from the A/D converter
I DSD data (for R-ch) input from the A/D converter
I PCM data input from the A/D converter
- Not used
- Not used
- Not used
- Power supply terminal (+3.3V)
- Ground terminal
- Not used
- Not used
- Not used
- Not used
- Not used
- Not used
- Not used
- Not used
- Not used
- Not used
- Not used
- Not used
- Not used
- Not used
- Not used
- Not used
- Not used
- Not used
Description
TA-ZH1ES
81