Diagram F - VTRef input
Diagram G - VTRef input (decoupled)
Diagram H - AC Ground
ARM 100893_0100_00_en
The VTRef input circuit diagram is shown in the following figure:
The VTRef input (decoupled) circuit diagram is shown in the following figure:
The AC Ground circuit diagram is shown in the following figure:
Copyright © 2017 ARM Limited or its affiliates. All rights reserved.
2 ARM
2.7 I/O diagrams for the DSTREAM-ST connectors
33R
10K
33R
100nF
10K
Non-Confidential
DSTREAM-ST target interface connections
®
-
~0.6V
Target detect
-
-
Buffered VTREF
-
Figure 2-17 VTRef input
-
~0.6V
Target detect
-
-
Buffered VTREF
-
Figure 2-18 VTRef input (decoupled)
Figure 2-19 AC Ground
100nF
2-35