Sony DXC-S500 Service Manual page 57

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AD9845AJST (AD)
12-BIT SIGNAL PROCESSOR FOR CCD CAMERA
—TOP VIEW —
37
38
39
40
41
42
43
44
45
46
47
48
PIN PIN PIN
I/O SIGNAL I/O SIGNAL
NO. NO. NO.
1 O 13 — 25
D0 D.V
CC
—
2 O 14 D.GND 26
D1
3 O 15 — 27
D2 D.GND
4 O 16 I DATACLK 28
D3
—
5 O D4 17 D.V 29
CC
6 O 18 I 30
D5 HD
I
7 O 19 PBLK 31
D6
8 O 20 I 32
D7 CLPOB
9 O 21 I SHP 33
D8
I
10 O D9 22 SHD 34
11 O 23 I 35
D10 CLPDM
I
12 O 24 VD 36
D11
INPUTS
AUX1IN, AUX2IN : ANALOG INPUT
CCDIN : ANALOG INPUT FOR CCD SIGNAL
CLPDM : INPUT CLAMP CLOCK
CLPOB : BLACK LEVEL CLAMP CLOCK
DATACLK : DEGITAL DATA OUTPUT LATCH CLOCK
HD : HORIZONTAL DRIVE
PBLK : PREBLANKING CLOCK
SCK : SERIAL DIGITAL INTERFACE CLOCK
SDATA : SERIAL DIGITAL INTERFACE DATA
SHD : CDS SAMPLING CLOCK FOR CCD' S DATA LEVEL
SHP : CDS SAMPLING CLOCK FOR CCD' S REFERENCE LEVEL
SL : SERIAL DIGITAL INTERFACE LOAD PULSE
STBY : STANDBY MODE
THREE-STATE : DIGITAL OUTPUT DISABLE
VD : VERTICAL DRIVE
OUTPUTS
BYP1, BYP2, BYP4 : INTERNAL BIAS LEVEL DECOUPLING
CML : INTERNAL BIAS LEVEL DECOUPLING
D0 - D11 : DIGITAL DATA
VRB : A/D CONVERTER BOTTOM REFERENCE VOLTAGE DECOUPLING
VRT : A/D CONVERTER TOP REFERENCE VOLTAGE DECOUPLING
OTHER
NC : NO CONNECTION
4 dB ± 6 dB COLOR
19
STEERING
PBLK
30
2 dB _ 36 dB
CCDIN CDS PxGA
2:1
VGA
MUX
CLP
6
23
CLPDM
36
AUX1IN
2:1
BUF
MUX
34
AUX2IN
CONTROL
REGISTERS
CLP
DIGITAL
INTERFACE
DXC-S500 (E)
24
23
22
21
20
19
18
17
16
15
14
13
PIN
I/O SIGNAL I/O SIGNAL
NO.
37
— A.GND O CML
— A.GND 38 O
VRT
39
— A.V O VRB
CC
O BYP1 40 —
D.V
CC
O BYP2 41 — D.GND
42
I CCDIN I THREE-STATE
— NC 43 —
NC
44
O BYP4 I STBY
— A.V 45 —
CC NC
I AUX2IN 46 I SL
47
— A.GND I SDATA
I AUX1IN 48 I
SCK
20
CLPOB
CLP
1 - 12
12
+ ADC
D0 - 11
38
VRT
BANDGAP
39
REFERENCE
OFFSET VRB
10
DAC
37
INTERNAL
CML
8
BIAS
INTERNAL
TIMING
HY57V561620BT-HDR (HYNIX)
256M (4194304 x 16 x 4) -BIT SDRAM
—TOP VIEW—
INPUTS
A0 - A12
V 1 54 GND
CC
AP
DQ0 2 53 DQ15
BS0, BS1
CAS
QV 3 52 QGND
CC
CKE
DQ1 4 51 DQ14
CLK
CS
DQ2 5 50 DQ13
LDQM
QGND 6 49 QV
CC
RAS
DQ3 7 48 DQ12
UDQM
WE
DQ4 8 47 DQ11
QV 9 46 QGND
CC
INPUTS/OUTPUTS
DQ5 10 45 DQ10
DQ0 - DQ15
DQ6 11 44 DQ9
OTHER
QGND 12 43 QV
CC
NC
DQ7 13 42 DQ8
V 14 41 GND
CC
LDQM 15 40 NC
WE
16 39 UDQM
CAS
CLK
17 38
RAS
18 37 CKE
CS
19 36 A12
BS0 20 35 A11
BS1 21 34 A9
A10/AP 22 33 A8
A0 23 32 A7
A1 24 31 A6
A2 25 30 A5
A3 26 29 A4
V 27 28 GND
CC
RTC4574JE-TP (EPSON)
RTC-4574JE
REAL TIME CLOCK
—TOP VIEW —
INPUTS
CE0, CE1
V 1 20 NC
CC
CLK
FCON
FOUT 2 19 NC
OUTPUTS
CE0 3 18 NC
AIRQ
AIRQ FOUT
4 17 NC
TIRQ
TIRQ
5 16 NC
INPUT/OUTPUT
DATA
CLK 6 15 NC
OTHER
DATA 7 14 NC
NC
CE1 8 13 NC
FCON 9 12 NC
GND 10 11 NC
32.768 kHz
OSC
DEVIDER
CLOCK AND
CALENDAR
2
FOUT
TIMER
OUTPUT
REGISTER
CONTROLLER
5
INTERRUPTS ALARM
TIRQ
4
CONTROLLER REGISTER
AIRQ
7
CONTROL
DATA
REGISTER
6 BUS
CLK
INTERFACE
8
SHIFT
CE1
CIRCUIT
3
REGISTER
CE0
: ADDRESS
: AUTO PRECHARGE ENABLE
: BANK SELECT
: COLUMN ADDRESS STROBE
: CLOCK ENABLE
: CLOCK
: CHIP SELECT
: LOWER DQ MASK ENABLE
: ROW ADDRESS STROBE
: UPPER DQ MASK ENABLE
: WRITE ENABLE
: DATA
: NO CONNECTION
: CHIP ENABLE
: SHIFT CLOCK
: CLOCK CONTROL
: ALARM INTERRUPT
: CLOCK
: CONSTANT CYCLE INTERRUPT
: DATA
: NO CONNECTION
CONTROL LINE
7-3
IC