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Operation state indicator circuit
D401 lights in green when the link between the gigabit transceivers of CHU and CCU is established with
the unit operated normally. A LINK_ON signal (synthesized using gate circuits IC402 and IC403) is
used that goes high when pin 31 (RX_DV) is high with pin 30 (RX_ER) of IC401 set low. The
LINK_ON signal is also sent to the microcomputer to monitor the link state.
3. Camera DSP circuit and 32-bit RISC-CPU system control circuit (3/5 circuit)
This circuit consists of camera signal processing DSP (IC521) that inputs the 10-bit CCD RGB digital
signal generated from an external camera head unit and performs the optimum camera image processing,
a 32-bit RISC CPU system control circuit incorporated into the same chip, and a peripheral
microcomputer system.
32-bit RISC-CPU, a camera image processing engine, an SDRAM interface circuit for controlling image
memory, an external SRAM interface for CPU operation processing, an internal timer TRC circuit, an
image compression/expansion JPEG engine, a card bus interface circuit (e.g., PC card), and other system
LSIs having an internal serial communication circuit are mounted on the DSP chip (IC521).
A 32-bit RISC-CPU program is stored in the external flash memory (IC524).
Functions of peripheral circuits
IC503 generates a CPU power of 3.3 V used in DSP (IC521).
IC505 backs up the data of a timer function when the DSP power is turned off. For the selection of the
power used, a power of 3.3 V supplied from IC503 using power switching circuit IC502 or a lithium
battery (BT1001) on the FM-84 board is selected.
IC509 generates a reset signal of 32-bit RISC-CPU in DSP when the power is turned on. During
operation, IC509 stops the operation when the supply voltage decreases to less than 3.0 V.
IC506, IC507, and IC532 monitor the power activation and stop operation of CCU.
Q505 monitors the insertion of a camera cable and turns on and off a power supply of +12 V to the
camera head unit that is connected to CCU.
IC523 is EEPROM. IC523 stores the initialization data or adjustment data of the whole CCU.
X502 (crystal oscillator of 24.576 MHz) is a driving clock of the whole CCU. It is used in common with
the basic clock of an IEEE1394 circuit.
4. 4/5 circuit
This is an interface circuit that receives the rotary encoder pulse detected on the SW-1082 board and
sends it to 32-bit RISC-CPU.
IC701 and IC705 periodically observe the encoder pulse. They output the differential data, obtained
when compared with the previously observed encoder pulse, as CPU data and control the rotation
direction and angle of an encoder.
5. 5/5 circuit
IC801 is an address decoder that generates the CS signal of the SY-301 board. IC802 is SRAM memory
of 8 MB. It is used as the external working memory of 32-bit RISC-CPU.
IC803 is external image memory. It mounts SDRAM of 256 MB and reads an image of 2560x1920.
Moreover, the signals of foot switches (FS1 and FS2) are detected via an analog switch using this circuit.
Connector CN801 is connected with the PD-106 board using a flexible flat cable. CN802, CN803, and
CN804 are connected with the FM-84 board using a flexible flat cable. CN805 is connected with the CN-
2272 board using a flexible flat cable. It inputs a switching signal based on the NTSC/PAL system.
6-8
DXC-S500 (E)
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