Technical Data Of Apci-8001 - Addi-Data APCI-8001 Commissioning Manual

CM / C M
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5.10 Technical data of APCI-8001

Axes:
Axis processor:
Memory:
Bus:
Addressing:
Encoder inputs:
Pulse signal
Incremental
encoder evaluation:
SSI encoder evaluation:
Encoder supply:
Setpoint value outputs for
servo power transformers:
Setpoint value outputs for
stepper motor transformers:
Digital inputs:
Digital outputs:
Safety functions:
ANUAL
1, 2, or 3. extension up to 8 axes with option print
OPMF
Mixed operation of servo or stepper motors possible
RISC, MIPS R5K range
Elementary frequency: 150 MHz (250 MHz Option),
word length: 64 Bit
Peak instruction rate: 325 Dhrystone 2.1 Mips and 500 MFlops
APCI-8001: 16 MB SDRAM
1 MByte Option
8 kB FLASH for hardware system parameters
PCI Universal, word length: 32 bit, Bus frequency: 33MHz or 66 MHz
PCI Plug & Play approx. 80 MB of physical address
memory is occupied (not PC main memory)
Directional discriminator for incremental encoders with two 90°
phase-shifted pulse trains and reset pulse, or its inverted pulse train
(6 channels)
SSI absolute encoder
5 V RS422 or TTL
x4, 32 bit with sign, 5.0 MHz (20 MHz after quadrupling)
1..32 bit, gray/binary codes, variable frequency 30 kHz .. 10 MHz
External auxiliary voltage depending on encoder type (5..30 V)
16-bit-DA converter, +/-10 V, 5 mA, potential-free
RS422 pulse and directional signals and their inverted
pulse trains, output current usually: -60 mA (max. -150 mA)
Pulse frequency: max. 10 MHz
16 optically decoupled inputs 18..36 V, input current at 24 V
approx. 8 mA. Function is freely programmable
Low level: 0..10 V – High level: 16..30 V
8 optically decouple outputs, output type: PNP 24V,
500 mA (internal current limit at 1 A)
Function mode is freely programmable
Setpoint state programmable after reset
Relay outputs max. 60 V/100 mA
Watchdog circuit, power-on reset,
efficient CPU exception model
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