Power Supplies
4
Power Supplies
The analog portion of the ADSxx54EVM-PDK requires a 5-V supply. The ADSxx54EVM-PDK is configured
at the factory using the onboard regulated analog 5-V supply (+VA); and an onboard 3.3-V digital supply.
Alternatively, set the AVDD analog supply voltage by connecting an external power source through two-
terminal connector
Pin Number
JP10
JP9
The external AVDD supply applied to external two-terminal connector J5 must
not exceed 5.5 V or device damage may occur. The external AVDD supply
must be in the range of 5.0 V to 5.5 V for proper ADSxx54EVM operation.
8
ADS8354EVM-PDK and ADS7854EVM-PDK
J5.Table 5
lists the configuration details for P3.
Table 5. Power-Supply Jumpers
Position
Shunt 2-3 (default)
Shunt 1-2
Open
Closed
Copyright © 2014, Texas Instruments Incorporated
Function
Onboard 5-V AVDD analog supply selected
External 5-V AVDD connected through two-terminal
block J5
Onboard regulated AVDD supply set to 5.0 V
Onboard regulated AVDD supply set to 5.2 V
CAUTION
www.ti.com
SBAU209 – April 2014
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