HP 64780A Installation/Service/Terminal Interface Manual page 168

Emulator/analyzer
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Chapter 9: Specifications and Characteristics
HP 64780A AC Timing Specifications
Num
Characteristic
1
4
Asynchronous Input Setup Time to
CLK01 Low
1
10
Asynchronous Input Setup Time to
CLK01 Low
2
12
DREQ Input Setup Time to CLK01
Low
2
14
DONE Input Setup Time to CLK01
Low
29
Data-in Setup Time to Clock Low
31
Clock High to Data-out Valid (CPU
Writes Data, Control, or Direction)
37
Clock High to IOUT Valid (Slave
Mode)
38
Clock High to RQOUT Valid (Slave
Mode)
65
CLK01 High to TOUT Valid
154
AS, DS, and R/W
unbuf
CLK01
unbuf
Min Max Min Max Min Max Min Max Unit
12
5
20
20
PIP/PIO
20
Interrupt Controller
n/a
n/a
Timer
3
IEEE 1149.1
specifications are not applicable
buf
unbuf
unbuf
buf
12
17
5
10
20
25
20
25
20
25
25
25
n/a
n/a
n/a
n/a
20
3
20
-2
buf
buf
17
ns
10
ns
25
ns
25
ns
25
ns
25
25
ns
n/a
ns
n/a
ns
18
-2
18
ns

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