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Eaton ELC-PB Programming Manual

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Page 2 Correcting Ladder Diagram....................1-14 Basic Program Design Examples ..................1-17 Chapter 2 – Programming Concepts ELC Memory Map for ELC-PB/ELCB-PB controllers ............2-2 ELC Memory Map for ELC-PC/PA/PH controllers............. 2-4 M N 0 5 0 0 3 0 0 3 E...
Page 3 ELC Memory Map for ELC-PV controllers ................. 2-7 ELC Memory Map for ELCM-PH/PA controllers .............. 2-10 ELC Latched Memory Settings..................2-13 ELC Latched Memory Modes.................... 2-16 ELC Bits, Nibbles, Bytes, Words, etc................2-17 Binary, Octal, Decimal, BCD, Hex..................2-17 Special M Relay........................2-20 2.10 S Relay ..........................
Page 4 Appendix A – Communications Communication Ports ......................A-2 Configuration of the communication ports ..............A-3 Selecting master or slave operation ..................A-3 Selecting transmission mode ....................A-3 Selecting data packet format ....................A-3 Communication Protocol ASCII transmission mode ............A-5 ADR (Modbus Address)......................A-5 CMD (Function code) and DATA (data characters) ...............
Page 5 F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m M N 0 5 0 0 3 0 0 3 E...
Page 6: Table Of Contents
ELC Concepts This chapter introduces basic and advanced concepts of ladder logic, which is the most used programming language with the ELC. Users familiar with the ELC concepts can move to the next chapter for further programming concepts. Users not familiar with the operating principles of the ELC, should read this chapter to get a full understanding of these concepts.
Page 7: Elc Scan Method
E L C P r o g r a m m i n g M a n u a l 1 ELC Concepts ELC Scan Method ELC utilizes a standard scan method when evaluating the user program. Scanning process: Read the physical input status and store the data in internal Scan input status memory.
Page 8: Current Flow
1 . E L C C o n c e p ts Scan time exception The ELC can process certain items faster than the scan time. Program interrupts halt the scan time to process the interrupt subroutine program. A direct I/O refresh instruction REF allows the ELC to access I/O immediately during user program evaluation instead of waiting until the next scan cycle.
Page 9: Elc Registers And Relays
E L C P r o g r a m m i n g M a n u a l ELC Registers and Relays Introduction to the basic internal devices in an ELC Bit memory which represents the physical input points and receives external input signals.
Page 10: Ladder Logic Symbols
1 . E L C C o n c e p ts Ladder Logic Symbols The following table displays the list of ELCSoft program symbols, along with their description, command, and memory registers that use them. Ladder Diagram Explanation Instruction Available Devices Structure NO (Normally Open)
Page 11: Creating A Elc Ladder Program
E L C P r o g r a m m i n g M a n u a l Ladder Diagram Explanation Instruction Available Devices Structure Multiple output branches None Output coil Y, M, S Step ladder Basic instructions and API Basic / Application instructions.
Page 12: Ld / Ldi (Load No Contact / Load Nc Contact)
1 . E L C C o n c e p ts Execution order of the sample program: T0 K10 1.5.2 LD / LDI (Load NO contact / Load NC contact) LD or LDI starts a row or block LD instruction LD instruction AND block OR block...
Page 13: Or / Ori (Connect No Contact In Parallel / Connect Nc Contact In Parallel)
E L C P r o g r a m m i n g M a n u a l 1.5.6 OR / ORI (Connect NO contact in parallel / Connect NC contact in parallel) OR (ORI) instruction connects a NO (NC) in parallel with another device or block. OR instruction OR instruction OR instruction 1.5.7 ORP / ORF (Connect Rising edge in parallel/ Connect Falling edge in parallel)
Page 14: Mps / Mrd / Mpp (Branch Instructions)
1 . E L C C o n c e p ts 1.5.10 MPS / MRD / MPP (Branch instructions) These instructions provide a method to create multiplexed output branches based on the current result stored by the MPS instruction. Branch Branch Description...
Page 15: Stl (Step Ladder Programming)
E L C P r o g r a m m i n g M a n u a l 1.5.11 STL (Step Ladder Programming) STL programming uses step points, e.g. S0 S21, S22, which allow users to program in a clear and understandable way like drawing a flow chart.
Page 16: Conversion Between Ladder Diagram And Instruction List Mode
1 . E L C C o n c e p ts Conversion between Ladder Diagram and Instruction List Mode Ladder Diagram Instruction block block Block in series block Block in parallel The output AN I continues based on status of Multiple outputs Start of step ladder...
Page 17 E L C P r o g r a m m i n g M a n u a l Fuzzy Syntax Generally, the ladder diagram programming is scanned “top to bottom and left to right”. However, some programming methods do not follow this principle and still deliver the same control results. Here are some examples explaining this kind of “fuzzy syntax.”...
Page 18 1 . E L C C o n c e p ts OR operation upward is not allowed. “Reverse current” flow is not allowed. R everse curr ent Output should be connected on top of the circuit. Block combination should be made on top of the circuit.
Page 19: Correcting Ladder Diagram
E L C P r o g r a m m i n g M a n u a l Correcting Ladder Diagram There are many ways to accomplish your ladder logic. The list below displays methods for creating ladder logic. Some methods will not work and others could be better. For each method that will not work or could be better, there is a suggested improvement.
Page 20 1 . E L C C o n c e p ts Example 3: “Reverse current” shown in diagram (a) is not allowed by the ELC. Instruction List Instruction List Example 4: For multiple outputs, connect the output without additional input devices to the top of the circuit to omit the MPS and MPP instructions.
Page 21 E L C P r o g r a m m i n g M a n u a l Example 5: To correct the circuit with reverse current flow, refer to the diagrams below LOO P1 rev er se c urrent LOOP1 Example 6: To correct the circuit with reverse current flow, refer to the diagrams below...
Page 22 1 . E L C C o n c e p ts Basic Program Design Examples The examples that follow illustrate how common functions can be programmed. Example 1 - Stop First latched circuit When X1 (START) = ON and X2 (STOP) = OFF, Y1 will be ON. If X2 is turned on, Y1 will be OFF.
Page 23 E L C P r o g r a m m i n g M a n u a l Example 6- Interlock control NC contact Y1 is connected to the Y2 output circuit and the NC contact Y2 is connected to the Y1 output circuit.
Page 24 1 . E L C C o n c e p ts Example 10 - Flashing Circuit The ladder diagram uses two timers to form an oscillating circuit which enables a flashing indicator or a buzzing alarm. n1 and n2 refer to the set values in T1 and T2 and T refers to timer resolution. Example 11 - Trigger Circuit In this diagram, rising-edge contact X0 generates trigger pulses to control two actions executing interchangeably.
Page 25 E L C P r o g r a m m i n g M a n u a l Example 14 - Timing extension circuit The total delay time: (n1+n2)* T. T refers to the timer resolution. Timer = T11, T12 Timer resolution: T (n1+n2)* T Example 15 –...
Page 26 1 . E L C C o n c e p ts Timing Diagram: Vertical Light Yellow 25 Sec Green 5 Sec 5 Sec Horizontal Light Yellow Green 25 Sec 5 Sec 5 Sec SFC Figure: M1002 K350 K250 M1013 K250 M1013 K350...
Page 27 E L C P r o g r a m m i n g M a n u a l Ladder Diagram: M1002 ZRST S127 K350 K250 M1013 K250 M1013 K350 1 - 2 2 F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m M N 0 5 0 0 3 0 0 3 E...
Page 28 1 . E L C C o n c e p ts ELCSoft programming (SFC mode) SFC logic Internal Ladder Logic LAD-0 M1002 ZRST S127 LAD-0 Transfer condition 1 TRANS* M1013 Transfer condition 4 TRANS* TRANS* TRANS* TRANS* TRANS* TRANS* TRANS* Transfer condition 7 TRANS*...
Page 29 E L C P r o g r a m m i n g M a n u a l MEMO 1 - 2 4 F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m M N 0 5 0 0 3 0 0 3 E...
Page 30 Programming Concepts The Eaton Logic Controller (ELC) is a programmable logic controller spanning an I/O range of 10 to 256 I/O points. ELC processors are so versatile they range from nano to small application size without ever needing to change processors.
Page 31 E L C P r o g r a m m i n g M a n u a l 2 Programming Concepts ELC Memory Map for ELC-PB/ELCB-PB controllers Items Specifications Remarks Control Method Stored program, cyclic scan system Batch processing method...
Page 32 2 . P r o g r a m m i n g C o n c e p ts Items Specifications Remarks Current value T0~T127, 128 words C0~C127, 16-bit counter, Current value C235~C254, 32-bit counter General D0~D407, Note 1 Total Latched D408~D599, Note 3...
Page 33 E L C P r o g r a m m i n g M a n u a l ELC Memory Map for ELC-PC/PA/PH controllers Items Specifications Remarks Control Method Stored program, cyclic scan system Batch processing method Fast I/O refresh instruction I/O Processing Method (when END instruction is executed) can override batch update...
Page 34 2 . P r o g r a m m i n g C o n c e p ts Items Specifications Remarks C235~C245, 1 phase 1 input, 11 points, Note 3 PH controllers, C246, C247, C249, C250, 1 32bit high- Total phase 2 input, 4 points ELC-PH12xxxx only...
Page 35 E L C P r o g r a m m i n g M a n u a l Items Specifications Remarks K-32,768 ~ K32,767 (16-bit operation), Decimal K-2,147,483,648 ~ K2,147,483,647 (32-bit operation) H0000 ~ HFFFF (16-bit operation), Hexadecimal H00000000 ~ HFFFFFFFF (32-bit operation) COM1: RS-232 (Slave), COM2: RS-485 (Master/Slave) Serial ports...
Page 36 2 . P r o g r a m m i n g C o n c e p ts ELC Memory Map for ELC-PV controllers Items Specifications Remarks Control Method Stored program, cyclic scan system Batch processing method Fast I/O refresh instruction I/O Processing Method (when END instruction is executed) can override batch update...
Page 37 E L C P r o g r a m m i n g M a n u a l Items Specifications Remarks S0~S9, 10 points Initial step point Note 2 S10~S19, 10 points Zero point (use with IST instruction) return Note 2 Total...
Page 38 2 . P r o g r a m m i n g C o n c e p ts Items Specifications Remarks K-32,768 ~ K32,767 (16-bit operation), Decimal K-2,147,483,648 ~ K2,147,483,647 (32-bit operation) H0000 ~ HFFFF (16-bit operation), Hexadecimal H00000000 ~ HFFFFFFFF (32-bit operation) COM1: RS-232 (Slave), COM2: RS-485 (Master/Slave) Both can Serial ports...
Page 39 E L C P r o g r a m m i n g M a n u a l ELC Memory Map for ELCM-PH/PA controllers Items Specifications Remarks Control Method Stored program, cyclic scan system Immediate I/O refresh Batch processing method (when I/O Processing Method instruction can override END instruction is executed)
Page 40 2 . P r o g r a m m i n g C o n c e p ts Items Specifications Remarks C0~C111, 112 points, Note 1 C128~C199,72 points, 16-bit count up Note 1 Total C112~C127,16 points, Note 2 points C200~C223, 24 points, 32-bit count...
Page 41 E L C P r o g r a m m i n g M a n u a l D1000~D1999, 1000 words, Special some are latched D9900~D9999，100 words, General storage for word For AIO modules length data Note 1, Note 5 E0~E7, F0~F7, 16 words, Index Note 1...
Page 42 2 . P r o g r a m m i n g C o n c e p ts ELC Latched Memory Settings ELC-PC/PA/PH Controllers Special auxiliary General Latched Latched relay M0~M511 M512~M999 M1000~M1999 M2000~M4095 Latched (default) Latched (default) Auxiliary Some are Start:...
Page 43 E L C P r o g r a m m i n g M a n u a l ELC-PV Controllers Special auxiliary General Latched Latched relay M0~M499 M500~M999 M1000~M1999 M2000~M4095 Non-latched Latched (default) Latched (default) Auxiliary (default) Some are latched relay Start: D1202 and they cannot...
Page 44 2 . P r o g r a m m i n g C o n c e p ts ELCM-PH/PA Controllers General Latched Special auxiliary relay M0~M511 M512~M999 M768~M999 M1000~M1999 M2048~M4095 Auxiliary M2000~M2047 relay Some are latched and Not latched Latched cannot be changed.
Page 45: Elc Latched Memory Modes
E L C P r o g r a m m i n g M a n u a l ELC Latched Memory Modes ELC-PB/ELCB-PB Controllers Clear all Clear all Memory Power M1031 Factory STOP=>RUN RUN=>STOP M1032 type OFF=>ON Non-latched...
Page 46: Elc Bits, Nibbles, Bytes, Words, Etc
2 . P r o g r a m m i n g C o n c e p ts ELC Bits, Nibbles, Bytes, Words, etc ELC controllers utilize five numeric types to perform different instructions. The following is the explanation of numeric types.
Page 47 E L C P r o g r a m m i n g M a n u a l Decimal value in ELC operation is attached with a “K”, e.g. K100 indicates the value 100 in Decimal format. Exception: When a constant K is used with bit devices X, Y, M, S, the value specified after K indicates the groups of 4-bit units, which forms a digit(4-bit), byte(8 bit), word(16bit), or double word(32-bit) data, e.g.
Page 48 2 . P r o g r a m m i n g C o n c e p ts Binary Octal Decimal (K) Hexadecimal (H) (BIN) (OCT) (DEC) (Binary Code Decimal) (HEX) For ELC Constant K, No. of No. of X, Y For DIP Switch and internal registers M, S, T, C,...
Page 49: Special M Relay
E L C P r o g r a m m i n g M a n u a l Special M Relay The special auxiliary relay (special M) are as shown in the following. Please notice that some SM will be different to the different Controller.
Page 50 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Type Latched Function ELCB setting STOP M1024 COM1 monitor request If the ELC receives an illegal communication request when HHP, PC or M1025 HMI connects to an ELC, M1025 =ON and save the error code in D1025.
Page 51 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Type Latched Function ELCB setting STOP M1043 Zero point return completed OFF R/W M1044 Zero point condition OFF R/W M1045 All outputs clear inhibit M1046 STL state setting (ON)
Page 52 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Type Latched Function ELCB setting STOP Matrix finding bit flag. When find it, it will M1091 OFF OFF stop comparing and M1091=1.
Page 53 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Type Latched Function ELCB setting STOP Deceleration flag (not available in ELC- M1118 OFF OFF OFF R/W PH _VERSION 1.4 and above) Completed function flag (not available in M1119...
Page 54 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Type Latched Function ELCB setting STOP MODRD/MODWR/MODRW data M1140 OFF OFF received error MODRD/MODWR/MODRW instruction M1141 OFF OFF error M1142 MVX instruction data received error OFF OFF...
Page 55 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Type Latched Function ELCB setting STOP Enabling the mask and alignment mark function on I600/I601(X6) corresponding to Y2 M1158 OFF OFF Enable CH2 pulse output pause (ramp...
Page 56 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Type Latched Function ELCB setting STOP M1183 = ON, disable auto mapping M1183 function when connected with AIO modules Set PLSY Y0 output as 0.01~100Hz M1190...
Page 57 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Type Latched Function ELCB setting STOP C215 counting mode setting (ON: count M1215 down) C216 counting mode setting (ON: count M1216 down) C217 counting mode setting (ON: count...
Page 58 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Type Latched Function ELCB setting STOP C238 counting mode setting (ON: count M1238 down) C239 counter mode setting (ON: count M1239 down) C240 counter mode setting (ON: count...
Page 59 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Type Latched Function ELCB setting STOP M1264 Enabling reset function of HHSC0 M1265 Enabling start function of HHSC0 M1266 Enabling reset function of HHSC1 M1267 Enabling start function of HHSC1 M1268 Enabling reset function of HHSC2...
Page 60 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Type Latched Function ELCB setting STOP M1283 Inhibiting I300/I301 Inhibiting I400/I401 M1284 For I400/I401, reverse interrupt trigger pulse direction (Rising/Falling) M1285 Inhibiting I500/I501 Inhibiting I601~I699...
Page 61 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Type Latched Function ELCB setting STOP Immediately shut down Y10 pulse output M1310 OFF OFF starting flag (For ELC-PH VERSION 1.4 and above only) Immediately shut down Y11 pulse output M1311...
Page 62 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Type Latched Function ELCB setting STOP M1325 Controlling reset input point of C240 M1328 Enabling start/reset of C235 M1329 Enabling start/reset of C236 M1330 Enabling start/reset of C237 M1331 Enabling start/reset of C238...
Page 63 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Type Latched Function ELCB setting STOP Reset after the 1st group pulse output CH0 (Y0, Y1) is completed for PLSY instruction M1347 Auto-reset Y0 when high speed pulse...
Page 64 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Type Latched Function ELCB setting STOP Indicating Slave ID#1 data transaction M1376 status on ELC Link Indicating Slave ID#2 data transaction M1377 status on ELC Link Indicating Slave ID#3 data transaction...
Page 65 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Type Latched Function ELCB setting STOP M1406 Slave ID#15 linking error M1407 Slave ID#16 linking error Indicating reading from Slave ID#1 is M1408 completed Indicating reading from Slave ID#2 is...
Page 66 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Type Latched Function ELCB setting STOP Indicating writing to Slave ID#8 is M1431 completed Indicating writing to Slave ID#9 is M1432 completed Indicating writing to Slave ID#10 is...
Page 67 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Type Latched Function ELCB setting STOP Indicating Slave ID#20 data transaction M1459 status on ELC LINK Indicating Slave ID#21 data transaction M1460 status on ELC LINK Indicating Slave ID#22 data transaction...
Page 68 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP ELC- Factory Type Latched Function ELCB setting STOP M1484 Slave ID#29 linking error M1485 Slave ID#30 linking error M1486 Slave ID#31 linking error M1487 Slave ID#32 linking error Indicating reading from Slave ID#17 is...
Page 69 E L C P r o g r a m m i n g M a n u a l ELCM STOP ELC- Factory Type Latched Function ELCB setting STOP Indicating writing to Slave ID#20 is M1507 completed Indicating writing to Slave ID#21 is M1508 completed Indicating writing to Slave ID#22 is...
Page 70 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP ELC- Factory Type Latched Function ELCB setting STOP Reset after the 4 group pulse output CH3 (Y6, Y7) is completed for PLSY instruction M1525 Auto-reset Y3 when high speed pulse...
Page 71: S Relay
10ms * 200 = 2000ms = 2 sec. General Timer For ELC-PB/PC/PA/PH, ELCB-PB, and ELCM-PH/PA controllers: The timer executes once when the program reaches END instruction. When TMR instruction is executed, the timer coil will be ON when the timing reaches its preset value.
Page 72 Accumulative Timer For ELC-PB/PC/PA/PH, ELCB-PB, and ELCM-PH/PA controllers: The timer executes once when the program reaches END instruction. When TMR instruction is executed, the timer coil will be ON when the current value reaches its preset value. For accumulative timers, current value will not be cleared when timing is interrupted.
Page 73: C (Counter)
Counters will increment their present count value when the input signal transitions from OFF ON. Item 16 bits counters 32 bits counters Type General General High speed C235~C238, C241, ELC-PB, C242, C244, C246, ELCB-PB C0~C127 C247, C249, C251, Counters C252, C254 C235~C244, C246, ELC-PC/PA...
Page 74 2 . P r o g r a m m i n g C o n c e p ts Example: C0 K5 When X0=ON, RST instruction will reset C0. When X1 transitions OFF ON, C0 will count up (add 1). When C0 reaches the preset value K5, C0 output coil Y0 will = ON and settings...
Page 75: High-Speed Counters
Contacts Y0, C0 2.13 High-speed Counters ELC-PB/PA/PH, ELCB-PB: ELC High-speed counters can be 1-phase or 2 phases and can count up to a frequency of 20KHz. The table below displays the relation to inputs X0-X5, X10-X11, and counters C235-C255. (ELC- PB/ELCB-PB: X0-X3, ELC-PC/PA: X0-X5, ELC-PH: X0-X5, X10, X11).
Page 76 2 . P r o g r a m m i n g C o n c e p ts M1260=OFF C240 is general U/D high-speed counter. M1260=ON It is Global reset for C235~C239. Counting mode selection The high-speed counter uses special D1022 in 2-phase inputs counting mode to select double frequency mode.
Page 77 E L C P r o g r a m m i n g M a n u a l PV, HHSC0 ~ 3. The pulse input frequency of HHSC0 ~ 3 of the ELC-PV can reach 200kHz, among which: C241, C246 and C251 share HHSC0 C242, C247 and C252 share HHSC1 C243, C248 and C253 share HHSC2...
Page 78 2 . P r o g r a m m i n g C o n c e p ts input signals. The corresponding external inputs can be used again as general input points (see the figure below). c) When special M is used as a high speed counter, the inputs controlled by START and RESET will be affected by the scan time.
Page 79 E L C P r o g r a m m i n g M a n u a l 2-phase (Triple frequency) 2 inputs (4 times frequency) ELCM-PH/PA: There are two types of high speed counters provided by ELCM-PH/PA including Software High Speed Counter (SHSC) and Hardware High Speed Counter (HHSC).
Page 80 2 . P r o g r a m m i n g C o n c e p ts Applicable Hardware High Speed Counters: 1-phase input 1-phase 2-input 2-phase 2-input C243 C244 C245 C246 C247 C248 C249 C250 C251 C252 C253 C254...
Page 81 E L C P r o g r a m m i n g M a n u a l “Dir” refers to direction control function. OFF indicates counting up; ON indicates counting down. When X1, X3, X4 and X5 is applied for reset function and associated external interrupts are disabled, users can define the reset function as Rising/Falling-edge triggered by special M relays Reset Function...
Page 82 When counter C241 attains settings K5, C241 will be ON. If there is still signal input for X0, it will keep on counting. C241 in ELC-PB, ELCB-PB and ELC-PC/PA/PH controllers has external input signals to reset X1. C241 in ELC-PV controllers has external input signals to reset X2 and start X3.
Page 83 When C247 attains settings K5, C247 will be on. After C247 is ON, if there is counter pulse input, C247 will keep on counting. C247 in ELC-PB, ELCB-PB and ELC-PC/PA/PH controllers has external input signals to reset X2. C247 in ELC-PV controllers has external input signals to reset X6 and start X7.
Page 84 When counter C251 attains settings K5, C251 contact will be ON. After C251 is ON, if there is counter pulse input, C251 will keep on counting. In ELC-PB, ELCB-PB and ELC-PC/PA/PH controllers frequency can be set to normal, double frequency or four times frequency by D1022 (counting mode setting). Factory setting is double frequency.
Page 85: Special Data Register
E L C P r o g r a m m i n g M a n u a l 2.14 Special Data Register The special registers (special D) are as shown in the following. Please notice that some equipments with the same number will be different to the different model. In the following chart, the values in the “Type”...
Page 86 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA D1028 Index register E0 D1029 Index register F0 Output numbers of Y0 pulse (Low D1030 word)
Page 87 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA For ELC-PA controllers, sampling D1062 range of AD (CH0, CH1): 2~4 For ELCM-PA controllers: sampling D1063 range of AD0～AD3 (CH0~CH3)):1~20...
Page 88 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA Average of PA controller analog input channel 0 (CH 0) Average of ELCM-PA analog input D1110 CH0 (AD 0) When sampling range in...
Page 89 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA D1123 Residual words of receiving data D1124 003A 003A Start character definition (STX)
Page 90 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA D1137 Address of operator error occurs Special expansion module number, D1140 maximum is 8 modules D1142...
Page 91 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA Target number for 2-phase pulse D1174 outputs (low 16-bit) Target number for 2-phase pulse D1175 outputs (high 16-bit)
Page 92 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA ELC-PH: When Interrupt X5 / I501 happens, D1198 will store the low word of high-speed counting value.
Page 93 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA End latched address of register D1219 4999 D2000~D4999 Phase of the 1st group pulse output D1220...
Page 94 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA When interrupt I500/I501/I300/I301 D1242 occurs, D1242 stores the low Word of high-speed counter.
Page 95 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA ID of the 1 right-side expansion D1320 module ID of the 2 right-side expansion...
Page 96 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA Low word of the present value of the group pulses CH1 (Y2, Y3) D1338 Low word of the present value of Y3...
Page 97 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA ELC-PH: The 1 step start frequency and the step end frequency of CH1 D1352 Start/end frequency of the 2 group...
Page 98 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA Time unit of PWM Y2 pulse output D1372 when M1071=ON Time unit of PWM Y4 pulse output...
Page 99 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA D1393 ID of the 8 left-side expansion module Assigning ID number of the starting D1399 slave on ELC Link network...
Page 100 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA D1440 Data length to be read on Slave ID#7 D1441 Data length to be read on Slave ID#8 D1442...
Page 101 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA Number of pulses required per D1468 2,000 revolution of motor at CH1 (low word) Number of pulses required per D1469...
Page 102 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA Data buffer to store the data to be written on Slave ID#3, when M1353 = D1560 OFF.
Page 103 E L C P r o g r a m m i n g M a n u a l ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA D1800 Data buffer to store the data read from ↓...
Page 104 2 . P r o g r a m m i n g C o n c e p ts ELCM STOP Factory Special D Type Latched Function ELCB setting STOP - PA word of ELC ID Setting for ELC- D1999 ACPGMXFR (Indicated by Hex format corresponding to ASCII codes)
Page 105: E, F Index Registers
(K, H). For ELC-PV controllers, it can be used for constant (K, H). Index register [E], [F] Index registers are 16-bit registers. There are 2 points, E0 and F0, for ELC-PB, ELCB-PB controllers. There are 8 points, E0~E3 and F0~F3, for ELC-PC/PA/PH controllers. There are 16 points, E0~E7 and F0~F7, for ELC-PV, ELCM-PH/PA controllers.
Page 106: Nest Level Pointer[N], Pointer[P], Interrupt Pointer [I]
2.17 Nest Level Pointer[N], Pointer[P], Interrupt Pointer [I] The control point of Pointer Master control nested N0~N7, 8 points master control nested ELC-PB, ELCB-PB Controllers = P0~P63 64 points The location point of For CJ, CALL instructions CJ, CALL ELC-PC/PA/PH/PV, ELCM-PH/PA Controllers = P0~P255, 256 points...
Page 107 E L C P r o g r a m m i n g M a n u a l ELC-PB, ELCB-PB Controllers = I610~I699, ( Timer resolution: 1ms), 1 point ELC-PC/PA/PH Controllers = I601~I699, I701~I799, ( Timer resolution: 1ms) , 2 points...
Page 108 External interrupt In ELC-PB/PC/PA/PH, ELCB-PB, When input signal of input terminal X0~X5 is triggered on rising- edge, it will interrupt the present program and jump to the designated interrupt subroutine pointer I001(X0), I101(X1), I201(X2), I301(X3), I401(X4), I501(X5) to execute and return to the previous address to execute when executing IRET instruction.
Page 109 When using the communication instruction RS, it can be set to have an interrupt request when receiving specific characters. Interrupt I150 and specific characters are set to the low byte of D1168 (ELC-PC/PA/PH), D1127 (ELC-PB, ELCB-PB). When the ELC connects to a communication device and the received data length is not the expected length, the end character in D1168 (D1127) and the interrupt subroutine I150 is set.
Page 110 2 . P r o g r a m m i n g C o n c e p ts Therefore, when the scan time is very long and you need the communication data to be processed immediately, you can use interruption I170 for this functionality. ELCM-PH/PA: I140: The communication instruction RS (COM1 RS-232) can be used to send an interrupt request when...
Page 111: Applications Of Special M Relay And Special D Register
E L C P r o g r a m m i n g M a n u a l 2.18 Applications of Special M Relay and Special D Register Function Group ELC Operation Flag Number M1000~M1003 Contents: These relays provide information about the ELC when switched to run mode. M1000: Always ON when in run mode.
Page 112 Function Group Program Capacity Number D1002 Contents: This register holds the program capacity of the ELC. ELC-PB, ELCB-PB controllers: 3,792 Steps (Word) ELC-PC/PA/PH controllers: 7,920 Steps (Word) ELC-PV controllers: 15,872 Steps (Word) ELCM-PH/M-PA controllers: 15,872 Steps (Word) Grammar Function Group...
Page 113 E L C P r o g r a m m i n g M a n u a l D1008 saves which address the STEP timeout occurred on. Function Group Scan Time Monitor D1010~D1012 Number Contents: The present value, minimum value and maximum value of scan time are saved in these registers. D1010: present scan time value.
Page 114 2 . P r o g r a m m i n g C o n c e p ts When X10 is ON, set M1015=ON to start high-speed timer and record in D1015. When X10=OFF, set M1015=OFF to close high-speed timer. M1015 Function Group M1016~M1017, M1076, D1313~D1319...
Page 115 Number Contents: X0 input point of ELC-PB/PA/PC/PH V1.4, ELCB-PB controllers can detect pulse width. Whenever X0 turns from ON to OFF, the value will be updated once and stored in D1023 (unit: 0.1ms). The minimum detectable width is 0.1ms and maximum 10,000ms.
Page 116 2 . P r o g r a m m i n g C o n c e p ts Function Group ELCM-PH/PA X6 pulse width detecting function Number M1083,M1084, D1023 Contents: When M1084 = ON, X6 pulse width detecting function is enabled and the detected pulse width is stored in D1023 (unit: 0.1ms) M1083 ON：detecting width of negative half cycle (OFF ON) M1083 OFF：detecting width of positive half cycle (ON OFF)
Page 117 E L C P r o g r a m m i n g M a n u a l ELCM-PH/PA M1029 = ON when Y0 pulse output completes. M1030 = ON when Y1 pulse output completes. M1102 = ON when Y2 pulse output completes. M1103 = ON when Y3 pulse output completes.
Page 118 When M1035 = ON, ELC-PC, ELCM-PH/PA use input point X7, ELC-PA use input point X3, ELC-PH use input point X5 to be RUN/STOP. ELC-PB, ELCB-PB does not support. When M1035 = ON, ELC-PV controllers will determine the content (K0 ~ K15) in D1035 to enable input points X0 ~ X17 as the RUN/STOP switch.
Page 119 E L C P r o g r a m m i n g M a n u a l It can only be used as slave and supports ASCII/RTU communication format, baud rate(115200bps max), and modify the length of data bit, including Data bits, Parity bits and Stop bits. COM2: It can be used as master or slave and supports ASCII/RTU communication format, baud rate (115200bps max), and modify the length of data bit, including Data bits, Parity bits and Stop bits.
Page 120 2 . P r o g r a m m i n g C o n c e p ts Modifying COM2 communication format to ASCII mode, 9600bps, 7 data bits, even parity, 1 stop bits (9600, 7, E, 1). M1002 D1120 M1120...
Page 121 E L C P r o g r a m m i n g M a n u a l COM2: M1002 D1120 M1120 M1143 Example4: Interruption I170 (after the data receiving is completed in Slave mode) COM2 of ELC-PV controllers supports the generation of interrupt I170 when the data receiving is completed in Slave mode.
Page 122 2 . P r o g r a m m i n g C o n c e p ts Can be used in master or slave mode. Supports ASCII/RTU communication format, baud rate (115200bps max), and modification on data length (data bits, parity bits, stop bits). D1036: COM1 (RS-232) communication protocol of master/slave ELC.
Page 123 E L C P r o g r a m m i n g M a n u a l Modify COM1 communication format to ASCII mode, 9600bps, 7 data bits, even parity, 1 stop bits (9600, 7, E, 1). M1002 D1036 M1138...
Page 124 2 . P r o g r a m m i n g C o n c e p ts Example 4: RTU mode setting of COM1、COM2、COM3 COM1, COM2 and COM3 support ASCII/RTU mode. COM1 is set by M1139, COM2 is set by M1143 and COM3 is set by M1320.
Page 125 E L C P r o g r a m m i n g M a n u a l Example: M1036 K1000 When X7=ON, the parameters of D0 are as follows: Index Function Speed detection of X0 signal input = low 16 bits of 32 bits. Speed detection of X0 signal input = high 16 bits of 32 bits.
Page 126 2 . P r o g r a m m i n g C o n c e p ts M1000 Constant scan time M1039 normally ON MOV P D1039 contact Scan time is fixed to 20ms The relative instructions of scan time are RAMP, HKY, SEGL, ARWS and PR. They should be used with “constant scan time”...
Page 127 E L C P r o g r a m m i n g M a n u a l Function D1116 Analog output channel 0 (DA 0). D1117 Analog output channel 1 (DA 1). Analog input filter setting (ms). For ELC-PA controllers, sampling time of analog/digital conversion Sampling time will be regarded as 5ms If D1118≦5.
Page 128 2 . P r o g r a m m i n g C o n c e p ts When the ELC is powered on or from STOP to RUN, it will check start file register function from M1101, the start number of file register from D1101, read item number of file register from D1102, to determine if it should send file register data to the designated data register automatically or not.
Page 129 E L C P r o g r a m m i n g M a n u a l Acceleration/Deceleration step number = (TF-SF)/GF Output pulse number for each step Frequency AP/(Acceleration or Deceleration step number) Pulse number AP is pulse number of acceleration/deceleration Note: This function should be executed when the following conditions all exist.
Page 130 2 . P r o g r a m m i n g C o n c e p ts You can get accel/decel step = (5K – 1K) / 1K = 4 and output number of each pulse is 40 / 4 = 10.
Page 131 E L C P r o g r a m m i n g M a n u a l Special High-speed pulse output (ELC-PC/PA) Function Group Two-axis synchronous control (ELC-PH) Number M1133~M1135, D1133~D1136 Contents: ELC-PC/PA controllers: Special High-speed pulse output The definition of special D and special M for special high-speed pulse (50KHz) output function: Function M1133...
Page 132 2 . P r o g r a m m i n g C o n c e p ts Function Y10 outputs starting flag for two-axis synchronous control M1133 M1135 Y11 outputs starting flag for two-axis synchronous control D1133 Y10 outputs the starting number of register (D) for two-axis synchronous control D1134 Set the number of segments of Y10 output for two-axis synchronous control...
Page 133 E L C P r o g r a m m i n g M a n u a l When the ELC program scans to END command, it will automatically check whether this function needs to be activated. When M1133 and M1135 are set in the same scan period, the two axes will output pulses simultaneously.
Page 134 2 . P r o g r a m m i n g C o n c e p ts Output pulse Output pulse Axis Segment number number D201,D200 K1000 D203,D202 K1000 D205,D204 K4000 D207,D206 K4000 D301,D300 K3000 D303,D302 K3000 D305,D304 K1000 D307,D306...
Page 135 E L C P r o g r a m m i n g M a n u a l Output pulse Output pulse Axis Segment number number D217,D216 K10190 D219,D218 K5095 D221,D220 K11932 D223,D222 K5966 D225,D224 K13380 D227,D226 K6690 D229,D228 K14498 D231,D230...
Page 136 2 . P r o g r a m m i n g C o n c e p ts M1002 K200 D1133 D1134 K300 D1135 D1136 M1133 M1135 Output frequency and number: the settings are the same as follows: Output pulse Output pulse Axis Segment...
Page 137 E L C P r o g r a m m i n g M a n u a l When M0, M1=ON, a 90° arc is drawn in quadrant 1; when M0, M3=ON, a 90° arc is drawn in quadrant 3;...
Page 138 2 . P r o g r a m m i n g C o n c e p ts Y axis (50000,50000) (-50000,50000) Y0=OFF Y0=ON Quadrant 2 Quadrant 1 Y1=ON Y1=ON X axis (0,0) Y0=ON Y0=OFF Quadrant 4 Y1=OFF Y1=OFF Quadrant 3 (-50000,-50000)
Page 139 E L C P r o g r a m m i n g M a n u a l M1002 D1134 D1136 = D0 K1 K200 D1133 K300 D1135 = D0 K2 K300 D1133 K200 D1135 = D0 K3 K200 D1133 K300...
Page 140 2 . P r o g r a m m i n g C o n c e p ts Output frequency and number: the settings are the same as example 2. Output pulse Output pulse Axis Segment number number D201,D200 K1230 D203,D202...
Page 141 E L C P r o g r a m m i n g M a n u a l x1…x10 is as table 3 Position x10(Rx) With decimal 615.55 2447.12 5449.61 9549.08 14464.59 20610.67 27300.42 34549.11 42178.25 50000 point Without decimal 2447...
Page 142 2 . P r o g r a m m i n g C o n c e p ts Reminder 1: When Rx=Ry, the user can calculate X axis, and copy X axis to Y axis (as fy1=fx10, fy2=fx9…fy10=fx1, and y1=x10, y2=x9…y10=x1) Reminder 2: When drawing a counterclockwise arc, switch the index value of X axis with that of Y axis.
Page 143 E L C P r o g r a m m i n g M a n u a l Index Function Interval time of first segment (GT1) Interval frequency of first segment (GF1) Target frequency of first segment (TF1) Lower 16-bit of 32-bit of target number of first segment output pulse Upper 16-bit of 32-bit of target number of first segment output pulse Start frequency of second segment (SF2)
Page 144 2 . P r o g r a m m i n g C o n c e p ts The minimum frequency of start frequency and target frequency should be equal to or greater than 200Hz. If it is less than 200Hz, it means finish executing or not to execute. The maximum frequency of start frequency of target frequency is 32,700Hz.
Page 145 E L C P r o g r a m m i n g M a n u a l 13. The valid parameter range is D0~D999 and D2000~D4999. the ELC will not execute this instruction, and close M1144 if the parameter is out of range (includes all segment parameters).
Page 146 2 . P r o g r a m m i n g C o n c e p ts M1002 MOV K200 D1144 D200 MOV K250 D202 MOV K500 D203 MOV K250 D204 K1000 D205 DMOV DMOV K2000 D206 MOV K750 D208 MOV K500 D209 MOV K-250 D210...
Page 147 E L C P r o g r a m m i n g M a n u a l M1002 M1148 M1144 Example 4: apply acceleration and deceleration of a segment to zero point return program. Relative flag timing chart is shown in the following. Acceleration for Deceleration for returning to zero point...
Page 148 2 . P r o g r a m m i n g C o n c e p ts Frequency(Hz) zero point Position Acceleration for Deceleration for returning to zero point returning to zero point Number setting of acceleration/deceleration, frequency and pulse are shown in the following. (correspond to component D) Index Settings...
Page 149 E L C P r o g r a m m i n g M a n u a l c) Note: This example is just an application method that user should adjust parameters settings used in d) acceleration/deceleration segment according to actual machine characteristics and limitation. Function Group Single Step Execution Number M1170, M1171, D1170...
Page 150 2 . P r o g r a m m i n g C o n c e p ts Function Explanation D1172 2-phase output frequency (12Hz~20KHz) D1173 2-phase output mode selection (k1and k2) D1174 Lower bit of 32-bit of 2-phase output pulse target number D1175 Upper bit of 32-bit of 2-phase output pulse target number D1176...
Page 151 E L C P r o g r a m m i n g M a n u a l D1178 VR0 value D1179 VR1 value Function explanation: This function only can be used at RUN mode. When M1178=ON, the variable value of VR 0 will be converted to digit 0~255 and saved in D1178.
Page 152 2 . P r o g r a m m i n g C o n c e p ts When M0 = ON, M1280 = ON. X0 external interrupt will be triggered by falling-edge pulse. Users do not have to change I101 to I000. Function Group Stores Value of High-speed Counter when Interrupt Occurs Number...
Page 153 E L C P r o g r a m m i n g M a n u a l For ELC-PC/PA/PH Controllers, When M1304=ON, input point X (X0-X7) of the ELC can be forced to be ON-OFF by using ELCSoft. For ELC-PV, when M1304 = ON, input point X of the ELC can be forced to be ON-OFF by using ELCSoft and the hardware LED will respond to it.
Page 154 2 . P r o g r a m m i n g C o n c e p ts a) Applicable to: DDRVI, DDRVA, PLSY instructions b) Criteria for executing output shutdown: Shut down the criteria contact for pulse output instruction and set M1334 as ON (Because PLSY does not have speeding up/slowing down setting, M1334 does not need to be set in PLSY) c) The time from executing output shutdown to the end of pulse output: Max.
Page 155 E L C P r o g r a m m i n g M a n u a l b) Criteria for executing output shutdown: Shut down the criteria contact for pulse output instruction and set M1335 as ON (Because PLSY does not have speeding up/slowing down setting, M1335does not need to be set in PLSY) c) The time from executing output shutdown to the end of pulse output: Max.
Page 156 2 . P r o g r a m m i n g C o n c e p ts Function Group ELC Link M1350-M1355, M1360-M1439, D1355-D1370, D1399, D1415-D1465, D1480- Number D1991 Contents: Explanation of Special D and special M explanation of ELC LINK ID1–ID8 for ELC-PC/PA/PH, ELCM-PH/PA: MASTER ELC SLAVE ID 1...
Page 157 E L C P r o g r a m m i n g M a n u a l Explanation of Special D and special M explanation of ELC LINK ID9–ID16 for ELC-PC/PA/PH, ELCM-PH/PA: MASTER ELC SLAVE ID 9 SLAVE ID 10 SLAVE ID 11 SLAVE ID 12...
Page 158 2 . P r o g r a m m i n g C o n c e p ts Special D and special M for ID1 ~ ID8 of the 32 stations in ELC LINK (M1353 = ON) for ELC- MASTER ELC SLAVE ID 1 SLAVE ID 2...
Page 159 E L C P r o g r a m m i n g M a n u a l Special D and special M for ID9 ~ ID16 of the 32 stations in ELC LINK (M1353 = ON) for ELC- MASTER ELC SLAVE ID 9 SLAVE ID 10...
Page 160 2 . P r o g r a m m i n g C o n c e p ts Special D and special M for ID17 ~ ID24 of the 32 stations in ELC LINK (M1353 = ON) for ELC-PV: MASTER ELC SLAVE ID 17...
Page 161 E L C P r o g r a m m i n g M a n u a l Special D and special M for ID25 ~ ID32 of the 32 stations in ELC LINK (M1353 = ON) for ELC-PV: MASTER ELC SLAVE ID 25...
Page 162 2 . P r o g r a m m i n g C o n c e p ts Explanation: The basic communication protocol for ELC LINK is MODBUS When Slave ELC is connected through COM1 (RS-232), baud rate and communication format of all Slaves must be the same (set in D1036).
Page 163 E L C P r o g r a m m i n g M a n u a l M1355 = ON, Slave status is user-defined. Set the linking status of Slave manually by M1360~M1375. M1355 = OFF, Slave status is auto-detected. Linking status of Slave can be monitored by M1360~M1375.
Page 164 2 . P r o g r a m m i n g C o n c e p ts Master ELC will read/write to slave ELC in order, i.e. it will read/write to the next slave after finishing a slave. Automatic / Manual mode explanation: Auto mode (M1351): when M1351 = ON, Master ELC will access slave ELCs as the operation described above, and stop the polling till M1350 or M1351 is OFF.
Page 165 E L C P r o g r a m m i n g M a n u a l Operation flow chart: Set starting reference for reading from slave ELC Set data length to be read on Slave ELC Set starting reference for writing in Slave ELC Set data length to be written on Slave ELC (ELC will take default or previous setting as the set value...
Page 166 2 . P r o g r a m m i n g C o n c e p ts Example 1: ELC LINK uses with M1354 M1002 D1121 D1120 M1120 K300 D1129 M1354 M1350 M1351 Example 2: Connection of 1 Master and 2 Slaves by RS-485 and exchange of 16 data between Master and Slaves through ELC LINK (M1353 = OFF, linkage of 16 stations, 16 data read/write mode) Write the ladder diagram program into Master ELC (ID#17)
Page 167 E L C P r o g r a m m i n g M a n u a l D1495 and D1512 ~ D1527 of the Master, and the data in D1496 ~ D1511 and D1528 ~ D1543 will be written into D200 ~ D215 of the two Slaves. Master ELC *1 Slave ELC*2 Read...
Page 168 2 . P r o g r a m m i n g C o n c e p ts Communication addresses of devices in ELC controllers: Applicable to ELC-PB, ELC- ELC-PV, Device Range Type Address ELCB-PB PC/PA/PH ELCM-PH/PA 000 ~ 255...
Page 169 E L C P r o g r a m m i n g M a n u a l Applicable to ELC-PB, ELC- ELC-PV, Device Range Type Address ELCB-PB PC/PA/PH ELCM-PH/PA 000 ~ 256 word 1000 ~ 10FF 256 ~ 511...
Page 170 Instruction Set This chapter contains all of the instructions that are used with the ELC controllers as well as detailed information concerning the usage of the instructions. This Chapter Contains 3.1 Basic Instructions (without API numbers) .................3-2 3.2 Basic Instruction Explanations ...................3-3 3.3 Pointers ..........................3-12 3.4 Interrupt Pointers .......................3-13 3.5 Application Programming Instructions................3-15...
Page 171: Basic Instructions (Without Api Numbers)
7.04 0.24 command Note: PB/PC/PA/PH/PV→ELC-PB/PC/PA/PH/PV, B-PB→ELCB-PB, M-PH/M-PA→ELCM-PH/PA. For ELC-PV series, the execution speed in the brackets ( ) refers to the execution speed of designated operand M1536 ~ M4095. F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m...
Page 172: Basic Instruction Explanations
3 . I n s t r u c t i o n S e t 3.2 Basic Instruction Explanations Mnemonic Operands Function Program steps X, Y, M, S, T, C Load A contact ELCB ELCM PC/PA/PH PH/PA Description: The LD instruction is used on the A contact that has its start from the left BUS or the A contact that is the start of a new block of program when using the ORB and ANB instructions (see later sections).
Page 173 E L C P r o g r a m m i n g M a n u a l Program Example: Instruction: Operation: ; Load contact B of X1 ; Connect to contact A of X0 in series ; Drive Y1 coil Mnemonic Operands Function...
Page 174 3 . I n s t r u c t i o n S e t Program Example: Instruction: Operation: ; Load contact A of X0 ; Connect to contact B of X1 in parallel ; Drive Y1 coil Mnemonic Operands Function Program steps...
Page 175 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Program steps Store the current result of the internal ELC X, Y, M, S, T, C operations ELCB ELCM PC/PA/PH...
Page 176 3 . I n s t r u c t i o n S e t Program Example: Instruction: Operation: ; Load contact A of X0 ; Save to stack ; Connect to contact A of X1 in series ; Drive Y1 coil ;...
Page 177 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Program steps Latch（ON） X, Y, M, S, T, C ELCB ELCM PC/PA/PH PH/PA Description: When the SET command is energized, the addressed bit is turned on. This instruction can only turn on a bit.
Page 178 3 . I n s t r u c t i o n S e t The timer value is set back to zero, the coil and the contact are General Timer both turned OFF The timer value is set back to zero, the coil and the contact are Timers for Subroutines both turned OFF and Interrupts...
Page 179 E L C P r o g r a m m i n g M a n u a l Mnemonic Function Program steps Program End ELCB ELCM PC/PA/PH PH/PA Description: An END statement must be placed at the end of an ELC program. An ELC controller will scan from program line 0 to the END statement, then return to line 0 again.
Page 180 3 . I n s t r u c t i o n S e t A scan cycle A scan cycle Mnemonic Function Program steps Positive contact to Negative contact ELCB ELCM PC/PA/PH PH/PA Description: When the conditions preceding PN command change from true to false, PN command (works as contact A) will be ON for a scan cycle.
Page 181: Pointers
SRET ; Subroutine return Available devices: ELC-PB and ELCB-PB have 64 pointers; available from the range of P0 to P63. ELC-PC/PA/PH/PV and ELCM-PH/PA have 256 pointers; available from the range of P0~P255. F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m...
Page 182: Interrupt Pointers
IRET ; Interrupt return Input Interrupts: ELC-PB and ELCB-PB have 4 input interrupts: (I001, X0), (I101, X1), (I201, X2) and (I301, X3). ELC-PC/PA/PH have 6 input interrupts: (I001, X0), (I101, X1), (I201, X2), (I301, X3), (I401, X4) and (I501, X5).
Page 183 , 00, falling-edge trigger Timer Interrupts: ELC-PB, ELCB-PB have 1 timer interrupt point: I610~I699, ( Timer resolution: 1ms) ELC-PC/PA/PH have 2 timer interrupts: I601~I699, I701~I799, ( Timer resolution: 1ms) ELC-PV has 3 timer interrupts: I601~I699, I701~I799, ( Timer resolution: 1ms); I801~I899, ( Timer resolution: 0.1ms)
Page 184: Application Programming Instructions
3 . I n s t r u c t i o n S e t 3.5 Application Programming Instructions ELC instructions each have a unique mnemonic. Most instructions are also given a number so the ELC knows how to execute the instruction. In the example below the numerical value given to the instruction is 00, also called the API (Application Programming Instruction) number.
Page 185 E L C P r o g r a m m i n g M a n u a l Source operand: if there is more than 1 source operand, then S … is used to describe them. Destination operand If an operand is only represented as a constant (K, H) then m, m , n, n is used to...
Page 186 3 . I n s t r u c t i o n S e t Note: If the cells adjacent to the operands are grayed, this means they support index registers E and F for those cells in the table above. For example, device D of operand S1 supports index registers E and F.
Page 187 E L C P r o g r a m m i n g M a n u a l If the 32-bit counters (C200~C255) are used as Data registers, each counter is a 32-bit counter. Only instructions using 32-bit operands can be assigned. Operand Data format X, Y, M, S are bit addresses and are either ON/OFF.
Page 188 Some instructions can be used unlimited times in the program, others can be used only a particular number of times in a program. These instructions can only be used once in a program: ELC-PB, ELCB-PB Model ELC-PB/PC/PA/PH/PV, ELCB-PB, ELCM-PH/PA Models SEGL ELC-PB, ELCB-PB Model DABSR...
Page 189 1. Instructions which can be executed only once: API 52 MTR (ELC-PC), API 56 SPD (ELC-PB/PC), API 69 SORT (ELC-PC), API 70 TKY (ELC-PC), API 71 HKY (ELC-PC), API 72 DSW (ELC-PC), API 74 SEGL (ELC-PC), API 75 ARWS, API 80 RS (ELC-PB/PC), API 100...
Page 190 3 . I n s t r u c t i o n S e t units. The total memeory units occupied by the three instructions cannot be more than 8 units. If there are more than 8 memory units occupied, the ELC system will execute the instruction that is scanned first and ignore the rest.
Page 191 E L C P r o g r a m m i n g M a n u a l Moving K1M0, K2M0, K3M0 to a 16-bit register clears the upper unused bits in the destination word. It’s the same as for K1M0, K2M0, K3M0, K4M0, K5M0, K6M0, K7M0 to 32-bit registers. The upper bits not included in the move are cleared in the 32-bit destination value.
Page 192 3 . I n s t r u c t i o n S e t 8-bit 23-bit exponent mantissa Sign bit 0: positive 1: negative -126 +128 The range of a 32-bit floating point value is from ±2 to ±2 , i.e.
Page 193 D (20+8). When F0=14, the destination address becomes D24. Data types supported in ELC-PB, ELCB-PB series: P, X, Y, M, S, KnX, KnY, KnM, KnS, T, C, D. Data types supported in ELC-PC/PA/PH, ELCM-PH/PA series: P, X, Y, M, S, KnX, KnY, KnM, KnS, T, C, D.
Page 194: Numerical List Of Instructions
3 . I n s t r u c t i o n S e t 3.6 Numerical List of Instructions Loop Control Mnemonic Availability STEPS Function M-PH 16 bits 32 bits 16 32 B-PB M-PA 00 CJ Conditional Jump 01 CALL Call Subroutine 02 SRET...
Page 195 E L C P r o g r a m m i n g M a n u a l Mnemonic Availability STEPS Function M-PH 16 bits 32 bits PV 16 32 B-PB M-PA 24 INC DINC Increment 25 DEC DDEC Decrement 26 WAND...
Page 196 3 . I n s t r u c t i o n S e t High Speed Processing Mnemonic Availability STEPS Function M-PH 16 bits 32 bits PV 16 32 B-PB M-PA 50 REF Refresh I/O Immediately 51 REFF Refresh and Filter Adjust 52 MTR - Input Matrix...
Page 197 E L C P r o g r a m m i n g M a n u a l Mnemonic Availability STEPS Function M-PH 16 bits 32 bits PV 16 32 B-PB M-PA 76 ASC - ASCII code conversion 11 - 77 PR - Output ASCII code...
Page 198 3 . I n s t r u c t i o n S e t Communication Instruction Mnemonic Availability STEPS Function M-PH 16 bits 32 bits PV 16 32 B-PB M-PA 100 MODRD - MODBUS data Read 101 MODWR - MODBUS data write in 107 LRC LRC check sum...
Page 199 E L C P r o g r a m m i n g M a n u a l Mnemonic Availability STEPS Function M-PH 16 bits 32 bits PV 16 32 B-PB M-PA DCOSH Hyperbolic Cosine DTANH Hyperbolic Tangent DADDR Floating Point Number Addition - 13...
Page 200 3 . I n s t r u c t i o n S e t Positioning Control Mnemonic Availability STEPS Function M-PH 16 bits 32 bits PV 16 32 B-PB M-PA DABSR - ABS current value read - 13 156 ZRN DZRN - Zero point return...
Page 201 E L C P r o g r a m m i n g M a n u a l Matrix Handling Mnemonic Availability STEPS Function M-PH 16 bits 32 bits PV 16 32 B-PB M-PA 180 MAND Matrix AND 181 MOR Matrix OR 182 MXOR...
Page 202 Specified Bit Note: PB/PC/PA/PH/PV→ELC-PB/PC/PA/PH/PV, B-PB→ELCB-PB, M-PH/M-PA→ELCM-PH/PA. ELC-PB, ELCB-PB does not support pulse execution type instructions (P instruction). M N 0 5 0 0 3 0 0 3 E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m...
Page 203: Detailed Instruction Explanation
S: The destination pointer of the conditional jump, P can be modified by Index register E, F ELC-PB, ELCB-PB have 64 pointers; available from the range of P0 to P63. ELC-PC/PA/PH/PV and ELCM-PH/PA have 256 pointers; available from the range of P0~P255.
Page 204 3 . I n s t r u c t i o n S e t Program Example 1: When X0=ON the program will skip from address 0 to N (label P1) automatically and continue executing. Logic between 0 and N will be skipped and will not be executed. When X0=OFF, all lines of code will be executed.
Page 205 S: The destination pointer of the call subroutine. P can be modified by Index registers E, F. ELC-PB, ELCB-PB have 64 pointers; available from the range of P0 to P63. ELC-PC/PA/PH/PV and ELCM-PH/PA have 256 pointers; available from the range of P0~P255.
Page 206 3 . I n s t r u c t i o n S e t Mnemonic Function SRET Subroutine Return Range Program Steps Automatically returns to the step immediately following the CALL SRET: 1 steps instruction which activated the subroutine ELCB ELCM PC/PA/PH...
Page 207 E L C P r o g r a m m i n g M a n u a l CALL CALL Main Subroutine Program FEND SRET CALL CALL Subroutine Subroutine SRET SRET Subroutine CALL SRET Subroutine SRET F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m M N 0 5 0 0 3 0 0 3 E 3 - 3 8...
Page 208 3 . I n s t r u c t i o n S e t Mnemonic Function IRET Interrupt Return Range Program Steps IRET ends the processing of an interrupt subroutine and returns IRET: 1 steps execution back to the main program ELCB ELCM PC/PA/PH...
Page 209 During the execution of an interrupt routine, an immediate I/O instruction can be performed by using the REF instruction. Points to note: ELC-PB. ELCB-PB models interrupt pointers (I): a) External interrupts: (I001, X0), (I101, X1), (I201, X2), (I301, X3) 4 points. b) Time interrupts: I6□□, 1 point (□□＝10~99, time base=1ms)
Page 210 3 . I n s t r u c t i o n S e t Flag Function M1059 High-speed counter interrupt, I010~I060 masked M1299 Communication interrupt, I150 masked ELC-PV models Interrupt pointers (I): a) External interrupts: (I00□, X0), (I10□, X1), (I20□, X2), (I30□, X3), (I40□, X4), (I50□, X5) 6 points.
Page 211 E L C P r o g r a m m i n g M a n u a l Flag Function M1297 Disable pulse output interrupt I130 M1298 Disable pulse output interrupt I140 M1299 Disable communication interrupt I150 M1300 Disable communication interrupt I160 M1301 Disable communication interrupt I170...
Page 212 3 . I n s t r u c t i o n S e t interrupt needs to trigger on falling-edge, M1280 must be reset (OFF) first and then the DI instruction must be enabled. Then the interrupt will be reset on the falling-edge when EI is executed again.
Page 213 E L C P r o g r a m m i n g M a n u a l Mnemonic Function FEND Terminate the Main Routine Program Range Program Steps Instruction driven by contact is not necessary. FEND: 1 steps ELCB ELCM PC/PA/PH...
Page 214 3 . I n s t r u c t i o n S e t CJ Command Program Flow The program flow The program flow when X0=On when X0=off, program jumps to P0 X1=off Main program CALL Main program FEND Main program FEND...
Page 215 E L C P r o g r a m m i n g M a n u a l CALL Command Program Flow The program flow when X0=off, The program flow X1=off when X0=Off, Main program X1=On. CALL Main program FEND Main program FEND...
Page 216 3 . I n s t r u c t i o n S e t Mnemonic Function Reset the Watchdog Timer Range Program Steps WDT, WDTP: 1 steps ELCB ELCM PC/PA/PH PH/PA Description: The WDT instruction can be used to reset the Watch Dog Timer. If the ELC scan time (from step 0 to END or FEND instruction) is more than 200ms, the ERROR LED will flash.
Page 217 E L C P r o g r a m m i n g M a n u a l Program Example: If the program scan time is over 300ms, users can divide the program into 2 parts. Insert the WDT instruction in the middle of the program, so both halves of the program’s scan time will be less than 200ms.
Page 218 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Loop Begin Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T FOR: 3 steps ELCB ELCM PC/PA/PH...
Page 219 E L C P r o g r a m m i n g M a n u a l Program Example 1: After loop A operates 3 times, the program after the last NEXT instruction will be scanned. For every complete cycle of loop A, loop B will execute 4 times.
Page 220 3 . I n s t r u c t i o n S e t Program Example 3: When the FOR / NEXT instructions are not to be executed, a CJ instruction can be used to jump around the loop. When X1=ON, the CJ instruction will jump to P0 and not execute the inner most FOR / NEXT loop.
Page 221 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Compare Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T CMP, CMPP: 7 steps DCMP, DCMPP: 13 steps ELCB...
Page 222 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Zone Compare S1, S2, S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T ZCP, ZCPP: 9 steps DZCP, DZCPP: 17 steps ELCB...
Page 223 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Move S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T MOV, MOVP: 5 steps DMOV, DMOVP: 9 steps ELCB...
Page 224 3 . I n s t r u c t i o n S e t Mnemonic Operands Function SMOV Shift Move S, m1, m2, S2, D, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T SMOV, SMOVP: 11 steps ELCB ELCM...
Page 225 E L C P r o g r a m m i n g M a n u a l M1001 M1168 SMOV D10(BIN 16bit) Auto conversion D10(BCD 4 digits) Shift move No variation No variation D20(BCD 4 digits) Auto conversion D20(BIN 16bit) If D10=H1234, D20=H5678 before execution, D10 remains unchanged and D20=H5128 after execution.
Page 226 3 . I n s t r u c t i o n S e t Program Example 3: Move the first digit of D1 to the third digit of D2 after the low byte of D2 is populated with X20-X27 and the low byte of D1 is populated with X30-X37.
Page 227 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Compliment and Move S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T CML, CMLP: 5 steps DCML, DCMLP: 9 steps ELCB...
Page 228 The range of n=1 – 512. ELC-PB, ELCB-PB models do not support KnX, KnY, KnM, KnS addresses. Program Example 1: When X20=ON, move the contents of the four registers D0~D3 to their corresponding registers D20~D23.
Page 229 BMOV In ELC-PV, when S < D, the instruction is processed following the order 1→2→3 BMOV In ELC-PB/PC/PA/PH and ELCM-PH/PA, when S < D, the BMOV instruction is processed in the order 3→2→1, then D11~D13 all equal to D10. BMOV F o r m o r e i n f o r m a t i o n v i s i t : w w w.
Page 230 ELC-PB, ELCB-PB models do not support KnX, KnY, KnM, and KnS devices. If operand S uses index register F, only 16 bit values are available...
Page 231 Points to note: When D and D are the same, and M1303=ON, the upper and lower 16-bits will be exchanged. ELC-PB, ELCB-PB does not support this. When X0=ON and M1303=ON, the upper and lower 16-bit contents of D100, D101 will exchange. Before...
Page 232 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Convert BIN to BCD S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T BCD, BCDP: 5 steps DBCD, DBCDP: 9 steps ELCB...
Page 233 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Convert BCD to BIN S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T BIN, BINP: 5 steps DBIN, DBINP: 9 steps ELCB...
Page 234 3 . I n s t r u c t i o n S e t 4 digit BCD format switch 4 digit BCD value Use the BIN command to store BIN value into D100 Use the BCD command to convert the BIN value in D100 Convert to be 4 digit BCD value 4 digit BCD format...
Page 235 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Addition Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T ADD, ADDP: 7 steps DADD, DADDP: 13 steps ELCB...
Page 236 3 . I n s t r u c t i o n S e t Flag operations: 16-bit instruction: If the operation result is “0”, then the Zero flag, M1020 is set to ON. If the operation result is less than -32,768, the borrow flag, M1021 is set to ON. If the operation result exceeds 32,767, the carry flag, M1022 is set to ON.
Page 237 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Subtraction Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T SUB, SUBP: 7 steps DSUB, DSUBP: 13 steps ELCB...
Page 238 If D is specified with a bit address, it must utilize K1~K8 to store a 32-bit result. If D is specified with a word address and the controller is a ELC-PB, ELCB-PB, it will only store the low 32-bit data. The ELC-PC/PA/PH/PV, ELCM-PH/PA will store 64-bit data. 4 consecutive 16-bit registers will be used to store 64-bit data.
Page 239 E L C P r o g r a m m i n g M a n u a l Program Example: The value in D10 is multiplied by the value in D0 and the total is a 32-bit result stored in (D21, D20). The upper 16-bit data is stored in D21 and the lower one is stored in D20.
Page 240 If D is specified with a bit address, it must utilize K1 ~ K8 to store a 32-bit result for ELC-PB, ELCB-PB controllers. 4 consecutive 16-bit registers are used to store the quotient and remainder for ELC-PC/PA/PH/PV, ELCM-PH/PA controllers.
Page 241 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Increment Bit Devices Word devices Program Steps Type INC, INCP: 3 steps Y M S H KnX KnY KnM KnS T DINC, DINCP: 5 steps ELCB ELCM...
Page 242 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Decrement Bit Devices Word devices Program Steps Type DEC, DECP: 3 steps Y M S H KnX KnY KnM KnS T DDEC, DDECP: 5 steps ELCB ELCM...
Page 243 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function WAND Logical AND 16-bit Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T WAND, WANDP: 7 steps ELCB ELCM...
Page 244 3 . I n s t r u c t i o n S e t Mnemonic Operands Function DAND Logical AND 32-bit Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DAND, DANDP: 13 steps ELCB ELCM PC/PA/PH...
Page 245 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Logical OR 16-bit Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T WOR, WORP: 7 steps ELCB ELCM...
Page 246 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Logical OR 32-bit Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DOR, DORP: 13 steps ELCB ELCM PC/PA/PH...
Page 247 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function WXOR Exclusive XOR 16-bit Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T WXOR, WXORP: 7 steps ELCB ELCM...
Page 248 3 . I n s t r u c t i o n S e t Mnemonic Operands Function DXOR Exclusive XOR 32-bit Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DXOR, DXORP: 13 steps ELCB ELCM...
Page 249 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Negative (2’s Compliment) Bit Devices Word devices Program Steps Type NEG, NEGP: 3 steps Y M S H KnX KnY KnM KnS T DNEG, DNEGP: 5 steps ELCB...
Page 250 3 . I n s t r u c t i o n S e t Indication of the negative value and absolute value The content of the most significant bit of the register indicates whether the value is positive or negative.
Page 251 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Rotate Right D, n Bit Devices Word devices Program Steps Type ROR, RORP: 5 steps Y M S H KnX KnY KnM KnS T DROR, DRORP: 9 steps ELCB...
Page 252 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Rotate Left D, n Bit Devices Word devices Program Steps Type ROL, ROLP: 5 steps Y M S H KnX KnY KnM KnS T DROL, DROLP: 9 steps ELCB ELCM...
Page 253 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Rotate Right with Carry D, n Bit Devices Word devices Program Steps Type RCR, RCRP: 5 steps Y M S H KnX KnY KnM KnS T DRCR, DRCRP: 9 steps...
Page 254 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Rotate Left with Carry D, n Bit Devices Word devices Program Steps Type RCL, RCLP: 5 steps Y M S H KnX KnY KnM KnS T DRCL, DRCLP: 9 steps ELCB ELCM...
Page 255 D to the most significant bits of S. This instruction works best with the pulse instruction (SFTRP). Valid range of operand n1, n2 : 1≤ n2 ≤ n1 ≤1024, In ELC-PB, ELCB-PB models: 1≦ n2 ≦ n1 ≦512 Program Example: When X0 OFF →ON, the 16 bits M0~M15 will shift 4 bits to the right, and 4 bits from X0-X3...
Page 256 D to the least significant bits of This instruction works best with the pulse instruction (SFTLP). Valid range of operand n1, n2 : 1≤ n2 ≤ n1 ≤1024, In ELC-PB, ELCB-PB models: 1≦ n2 ≦ n1 ≦512 Program Example: When X0 OFF →ON, the 16 bit data of M0~M15 will shift 4 bits to the left.
Page 257 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function WSFR Word Shift Right S, D, n Bit Devices Word devices Program Steps Type WSFR, WSFRP: 9 steps Y M S H KnX KnY KnM KnS T ELCB...
Page 258 3 . I n s t r u c t i o n S e t Program Example 2: When X0 OFF →ON, the bit registers of Y20~Y37 are shifted 2 digits to the right. Please refer to the following steps to perform WSFR instruction of one time shift.
Page 259 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function WSFL Word Shift Left S, D, n Bit Devices Word devices Program Steps Type WSFL, WSFLP: 9 steps Y M S H KnX KnY KnM KnS T ELCB...
Page 260 3 . I n s t r u c t i o n S e t Mnemonic Operands Function SFWR Shift Register Write S, D, n Bit Devices Word devices Program Steps Type SFWR, SFWRP: 7 steps Y M S H KnX KnY KnM KnS T ELCB ELCM...
Page 261 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function SFRD Shift Register Read S, D, n Bit Devices Word devices Program Steps Type SFRD, SFRDP: 7 steps Y M S H KnX KnY KnM KnS T ELCB...
Page 262 D must be the same data type, Valid range: D ≦ D ELC-PB, ELCB-PB models, standard and High speed counters cannot be mixed. This instruction works best with the pulse instruction (ZRSTP). Program Example: When X0 = ON, M300 to M399 will be reset to OFF.
Page 263 E L C P r o g r a m m i n g M a n u a l Points to note: Bit addresses Y, M, S and word addresses T, C, D, can be reset individually with the RST instruction.
Page 264 3 . I n s t r u c t i o n S e t Mnemonic Operands Function DECO Decode S, D, n Bit Devices Word devices Program Steps Type DECO, DECOP: 7 steps Y M S H KnX KnY KnM KnS T ELCB ELCM PC/PA/PH...
Page 265 E L C P r o g r a m m i n g M a n u a l Program Example 2: D valid range: 0< n ≦4, if n=0 or n>4, an error will occur. When n=4, the maximum decoded data is 2 = 16 points.
Page 266 3 . I n s t r u c t i o n S e t Mnemonic Operands Function ENCO Encode S, D, n Bit Devices Word devices Program Steps Type DECO, DECOP: 7 steps Y M S H KnX KnY KnM KnS T ELCB ELCM PC/PA/PH...
Page 267 E L C P r o g r a m m i n g M a n u a l Program Example 2: S Valid rang: 0< n ≦4. If n=0 or n>4, an error will occur. When n=4, the maximum decoded data is 2 = 16 points.
Page 268 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Sum of ON bits S, D Bit Devices Word devices Program Steps Type SUM, DSUMP: 5 steps Y M S H KnX KnY KnM KnS T DSUM, DSUMP: 9 steps ELCB ELCM...
Page 269 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Bit ON Test S, D, n Bit Devices Word devices Program Steps Type BON, BONP: 7 steps Y M S H KnX KnY KnM KnS T DBON, DBONP: 13...
Page 270 3 . I n s t r u c t i o n S e t Mnemonic Operands Function MEAN Mean Value S, D, n Bit Devices Word devices Program Steps Type MEAN, MEANP: 7 steps Y M S H KnX KnY KnM KnS T DMEAN, DMEANP: 13 steps ELCB...
Page 271 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Alarm Set S, m, D Bit Devices Word devices Program Steps Type ANS: 7 steps Y M S H KnX KnY KnM KnS T ELCB ELCM...
Page 272 3 . I n s t r u c t i o n S e t Mnemonic Function Alarm Reset Range Program Steps Instruction driven by contact is necessary. ANR, ANRP: 1 steps ELCB ELCM PC/PA/PH PH/PA Description: ANR instruction is used to reset an alarm. When several alarm devices are ON, the lowest alarm number will be reset.
Page 273 E L C P r o g r a m m i n g M a n u a l Application example for Alarms: X0=forward switch X1=backward switch X2=front location switch X3=back location switch X4=alarm device reset button Y0=forward Y1=forward Y2=alarm indicator S910=forward alarm device S920=backward alarm...
Page 274 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Square Root S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T SQR, SQRP: 5 steps DSQR, DSQRP: 9 steps ELCB ELCM...
Page 275 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Floating Point S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T FLT, FLTP: 5 steps DFLT, DFLTP: 9 steps ELCB...
Page 276 3 . I n s t r u c t i o n S e t Program Example 2: When M1081 = ON, the source data is converted from floating point to integer. (ignore the decimal point) When X20 = ON, D1, D0 (floating point value) is converted to D12 (16-bit integer). If D1 (D0) =H47C35000, the floating point result is 100,000.
Page 277 E L C P r o g r a m m i n g M a n u a l Covert D10 (16-bit integer) to D101, D100 (floating point). Covert the value of X7~X0 (BCD value) to D200 (16-bit integer value). Covert D200 (16-bit integer) to D203, D202 (floating point).
Page 278 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Refresh I/O Immediately D, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T REF, REFP: 5 steps ELCB ELCM...
Page 279 E L C P r o g r a m m i n g M a n u a l Program Example 1: When X0 = ON, ELC will read the state of X0~X7 input points immediately. No input delay occurs. Program Example 2: When X0 = ON, the output signal Y0~Y7 (8 points) are sent to the output terminals immediately.
Page 280 3 . I n s t r u c t i o n S e t Mnemonic Operands Function REFF Refresh and Filter Adjust Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T REFF, REFFP: 3 steps ELCB ELCM...
Page 281 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Input Matrix S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T MTR: 9 steps ELCB ELCM...
Page 282 3 . I n s t r u c t i o n S e t The figure below is an example wiring diagram for the operation of the MTR instruction. The external 2 rows consist of 2 sets of inputs wired to X40~47 and Y40~41. A total of 16 addresses are used to store the states of the two rows of inputs: M10~M17, M20~M27.
Page 283 E L C P r o g r a m m i n g M a n u a l Points to note: Operand S must be a multiple of 10, i.e. X0, X10, X20… etc. and occupies 8 continuous input addresses.
Page 284 Operand S for ELC-PH must be C235~ C255. Interrupt pointers I010 to I060 can be used for D, but ELC-PB, ELCB-PB models do not support these interrupts. ELC-PB/PC/PA/PH, ELCB-PB series controllers do not support E, F index registers for D Flags: M1289 ~ M1294 are used to inhibit interrupts for the high speed counters in ELC-PV series.
Page 285 E L C P r o g r a m m i n g M a n u a l M1000 DCNT C235 K1000 DHSCS K100 C235 On immediately Program Example 2: Difference between a Y output for DHSCS instructions and general Y output: When C249’s value changes from 99→100 or 101→100, Y0 output of DHSCS immediately energizes the output Y0 using the interrupt process which is independent of the scan time.
Page 286 3 . I n s t r u c t i o n S e t M1000 DCNT C251 K1000 DHSCS K100 C251 I010 FEND M1000 I010 IRET ELC-PC/PA/PH, ELCM-PH/PA models, M1059 is the high-speed counter interrupt disable flag ELC-PV models, M1289 ~ M1294 are the disable flags for high speed counter interrupts for I010 ~ I060, i.e.
Page 287 E L C P r o g r a m m i n g M a n u a l Counter C238 C239 C240 C241 C242 DHSCS Hi-speed interrupt I040 I050 I060 I070 I080 C232~C242 share 6 software comparators Hi-speed compare Set/Reset d) Block diagram of software counters and comparators: Softwar e comparator x 6...
Page 288 3 . I n s t r u c t i o n S e t Hardware comparator A x 4 Set /res et I010 Count Hardware value counter Set /res et I040 Hardware comparator Set /res et B x 4 I050 Count Hardware...
Page 289 E L C P r o g r a m m i n g M a n u a l Program Example 5: Set/reset M0 by utilizing the hardware comparator M1000 DCNT C251 K100 C251 DHSCS K100 C251 DHSCR K100 When the accumulated value in C251 increments from 100 to101, the DHSCS instruction sets M0 ON.
Page 290 20KHz. If the input is 2-phase 2 inputs signal, the frequency will be four times the counting frequency. Therefore, the counting frequency of 2-phase 2 inputs is 4KHz. In ELC-PB, ELCB-PB models, DHSCS and DHSCR instruction cannot be used more than 4 times. High-speed counter provided in ELC-PC/PA/PH series models:...
Page 291 E L C P r o g r a m m i n g M a n u a l than 6 times. ELC-PH models: total counting frequency is 130 KHz Type 1-phase 1 input 1-phase 2 inputs 2-phase 2 inputs C235 C236 C237 C238 C239 C240 C241 C242 C243 C244 C245 C248 C246 C247 C249 C250 C251 C252 C254 C255 Input Increasing input...
Page 292 3 . I n s t r u c t i o n S e t c) The original quantity of high-speed comparison instructions supported by ELC-PC/PA won’t decrease due to the addition of a high-speed counter. d) When high-speed output response times are required for the output of a high-speed comparison instruction (DHSCS), it is recommended to use Y10 or Y11.
Page 293 E L C P r o g r a m m i n g M a n u a l b) D1022=K2 (double frequency) Signal Diagram A-phase B-phase Counting up Counting down c) D1022=K4 (four times frequency) Signal Diagram A-phase B-phase Counting up Counting down...
Page 294 3 . I n s t r u c t i o n S e t Counter Program-interruption Hardware high speed counter type high speed counter Type 1-phase 1 input 1-phase 1 input 1-phase 2 inputs 2-phase 2 inputs Input C235 C236 C237 C238 C239 C240 C241 C242 C243 C244 C246 C247 C248 C249 C251 C252 C253 C254 U: Progressively increasing input A: A phase input...
Page 295 E L C P r o g r a m m i n g M a n u a l HHSC0 HHSC1 HHSC2 HHSC3 Present value in counter Counting reaches set value Counting pulses HHSC0 HHSC1 Comparator 8 set values HHSC0 HHSC1 HHSC2 HHSC3 HHSC2 Counting pulses...
Page 296 3 . I n s t r u c t i o n S e t High-speed counter provided in ELCM-PH/PA series Models: There are two types of high speed counters provided by ELCM-PH/PA including Software High Speed Counter (SHSC) and Hardware High Speed Counter (HHSC). The same Input point (X) can be used with only one high speed counter.
Page 297 E L C P r o g r a m m i n g M a n u a l Applicable Hardware High Speed Counters: 1-phase 1-phase 2-input 2-phase 2-input input C243 C244 C245 C246 C247 C248 C249 C250 C251 C252 C253 C254 Count up Phase A input Dir: Direction signal input...
Page 298 3 . I n s t r u c t i o n S e t C243 and C244 support count-up mode only and occupy input points X1 and X3 as reset (“R”) functions. If the reset function is not needed, set the special M relays ON (M1243 and M1244) to disable the reset function.
Page 299 E L C P r o g r a m m i n g M a n u a l M1000 DCNT C243 K100 FEND M1000 I101 D1240 DMOV IRET Special registers for relevant flags and settings of high speed counters: Flag Function M1059...
Page 300 3 . I n s t r u c t i o n S e t Flag Function M1269 Disable the external control signal input point of HHSC2 start signal point (S) ELC-PV: Disable the external control signal input point of HHSC3 reset signal M1270 point (R) ELCM-PH/PA: C235 counting mode setting (ON: falling-edge count)
Page 301 M1332 Enable Start/Reset of C239 M1333 Enable Start/Reset of C240 Special D Function Multiplied frequency of A-B phase counters for ELC-PB/PC/PA/PH, D1022 ELCB-PB, ELCM-PH/PA series D1150 Table counting register for DHSZ multiple set values comparison mode D1151 Register for DHSZ instruction frequency control mode (counting by table)
Page 302 3 . I n s t r u c t i o n S e t Special D Function Counting modes of HHSC0 ~ HHSC3 in ELC-PV series (default = 2) 1: Normal frequency counting mode D1225 ~ 2: Double frequency counting mode D1228 3: Triple frequency counting mode 4: 4 times frequency counting mode...
Page 303 ELC-PH/PV must be C235~ C255. Operand S of ELCM-PH/PA must be C232~ C254. Operand D of ELC-PB/PC/PA, ELCB-PB cannot use the counter addresses for D. Operand D of ELC-PH can use C243, C245, C250, and C255. Operand D of ELC-PV can be use C241~C254.
Page 304 3 . I n s t r u c t i o n S e t Program Example 2: When DHSCR instruction uses the same high speed counter number as a DCNT instruction, and when the present value in the high speed counter C251 changes from 999 to 1,000 or 1,001 to 1,000, C251 will be reset.
Page 305 E L C P r o g r a m m i n g M a n u a l M1000 DCNT C251 K1000 DHSCR C251 M1261 F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m M N 0 5 0 0 3 0 0 3 E 3 - 1 3 6...
Page 306 3 . I n s t r u c t i o n S e t Mnemonic Operands Function HSC Zone Compare , S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DHSZ: 17 steps ELCB ELCM...
Page 307 E L C P r o g r a m m i n g M a n u a l Softwar e comparator x 6 Softwar e Set / reset C ounter 1 Set / reset Softwar e Count value counter 2 Set / reset Softwar e...
Page 308 3 . I n s t r u c t i o n S e t longer available for DHSZ instruction. If comparators are used repeatedly, the syntax error will be detected on the previous instruction.. Program Example 1: When D is specified as Y0, then Y0~Y2 will also be used.. When the DHSZ instruction is executed and the high-speed counter C246 is counting, if the high or low limit value is reached, one of Y0~Y2 will be ON.
Page 309 E L C P r o g r a m m i n g M a n u a l Timing diagram Speed of variable speed rotational equipment High speed forward Low speed forward Stop 2400 Current value of 2000 C251 counter Program Example 3: Program Example 3 is only applicable to ELC-PV series.
Page 310 3 . I n s t r u c t i o n S e t 255). If the number falls outside of the range, SET/RESET will not be enabled when the comparison reaches its target. When this mode is enabled, the ELC will first acquire the values in D0 and D1 as the target values for the first comparison section.
Page 311 E L C P r o g r a m m i n g M a n u a l Present value in C251 M1151 D1150 14. Special registers for flags and relevant settings: Flag Function M1150 DHSZ instruction in multiple set values comparison mode M1151 The execution of DHSZ multiple set values comparison mode is completed.
Page 312 3 . I n s t r u c t i o n S e t will be 0, indicating that ELC performs the comparison based on the group 0 data. When the group 0 data in the table has been compared, the ELC will first execute at the frequency set in group 0 data (D2, D3) and copy the data to D1152 and D1153, determining if the comparison reaches the target number of groups.
Page 313 E L C P r o g r a m m i n g M a n u a l Present value in C251 (Hz) 15,000 10,000 5,000 M1153 D1151 12. Special registers for flags and relevant settings: Flag Function M1152 DHSZ instruction in frequency control mode M1153...
Page 314 3 . I n s t r u c t i o n S e t DMOVP K5000 DMOVP K10000 DMOVP K15000 DMOVP K6000 DMOVP DMOVP DMOVP K100 DMOVP K200 DMOVP K300 K400 DMOVP DHSZ C251 M1152 DPLSY D1152 Frequency Number Output point pulses...
Page 315 D+4 indicates the remaining time, the max. is 32767ms. Both are 32-bit integer values. ELC-PB, ELCB-PB models: Maximum frequency: X1=20KHz, X2=10KHz, Total frequency must be less than 20KHz. ELC-PC/PA/PH models: Maximum frequency: X1=30KHz, X2=10KHz, Total frequency must be less than 30KHz.
Page 316 3 . I n s t r u c t i o n S e t Rotation speed × The number of pulses per rotation of the motor Detection time specified by S (ms) 10. When M1036 in the ELC-PH series (V1.4 and above) is enabled, the SPD instruction can detect the speeds at X0 ~ X5 at the same time with a total bandwidth of 40KHz.
Page 317 E L C P r o g r a m m i n g M a n u a l K1000 D2: current D0: detection value value D2: content value 1000ms 1000ms 1000 D4: content D4:remaining time (ms) value F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m M N 0 5 0 0 3 0 0 3 E 3 - 1 4 8...
Page 318 For ELC-PV series, when the number of output pulses is set to 0, there will be continuous pulse output with no limit on the number of pulses. For ELC-PB/PC/PA/PH, ELCB-PB series, you must to turn M1010 (Y0) or M1023 (Y1) On to allow a continuous pulse output with no limit on the number of pulses.
Page 319 For the pulse output terminal specified in D, the ELC-PV series can use Y0, Y2, Y4 and Y6, The ELC-PB/PC/PA, ELCB-PB series can use Y0 and Y1 and the ELC-PH series can use Y0, Y1, Y10 and Y11. (ELC-PH V1.2 and above supports Y10 and Y11).
Page 320 F, then only the 16-bit instruction is available (PLSY). 16. For ELC-PB, ELCB-PB series, the PLSY instruction can only be used twice in the program. 17. For ELC-PC/PA/PH/PV series, there is no limit on the number of times this instruction may be used in the program.
Page 321 Points to note: Flags and special registers for ELC-PB, ELCB-PB series: F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m...
Page 322 3 . I n s t r u c t i o n S e t M1010: When M1010=ON, continuous pulses will be sent out Y0. When M1010=OFF, the PLSY instruction will send the number of pulses specified in S M1023: When M1023=ON, Y1 will send continuous pulses.
Page 323 E L C P r o g r a m m i n g M a n u a l D1351: For ELC-PH, Present total number pulses for output Y11 (HIGH WORD). Flags and special registers for ELC-PV series: M1010: When On, CH0, CH1, CH2 and CH3 will send pulses at END of program scan.
Page 324 3 . I n s t r u c t i o n S e t D1221: Phase setting for CH1 (Y2, Y3): D1221 determines the phase type for CH1 with the low two bits; other bits in this word are invalid. 1.
Page 325 E L C P r o g r a m m i n g M a n u a l M1102: M1102 = ON when Y2 pulse output is complete. M1103: M1103 = ON when Y3 pulse output is complete. M1078: Pause sending pulses out Y0 M1079:...
Page 326 3 . I n s t r u c t i o n S e t Generally when the pulse output is complete, the PLSY instruction must be reset so that the instruction can be executed again. When M1347, M1348, M1524 or M1525 is enabled, the associated output terminals (Y0~Y3) will be reset automatically when the pulse output is complete, i.e.
Page 327 E L C P r o g r a m m i n g M a n u a l Program Example 2: M1347 PLSY K1000 K1000 Description: When both X1 and X2 are ON, the pulse output to Y0 will operate continuously. However, there will be a delay of approx.
Page 328 Y0, Y2, Y4, Y6 Y1, Y3 For the ELC-PB, ELCB-PB models, The output specified in D cannot be the same as the output used in a PLSY or PLSR instruction. The PWM instruction can only be used once in the program.
Page 329 Output Y1 T=2000ms Note: 1. Flags and special registers for the ELC-PB/PC/PA/PH, ELCB-PB series controllers: M1070: Selecting the clock pulse units of Y1 for the PWM instruction (ON:100 us, OFF: 1ms) 2. Flags and special registers for ELC-PV series controllers:...
Page 330 3 . I n s t r u c t i o n S e t D1371: Time unit of CH0 output pulses when M1070 = On. D1372: Time unit of CH1 output pulses when M1071 = On. D1373: Time unit of CH2 output pulses when M1530 = On. D1374: Time unit of CH3 output pulses when M1531 = On.
Page 331 : Acceleration/Deceleration time (ms) D: Pulse output address Description: (ELC-PB/PC/PA/PH/PV, ELCB-PB) : the maximum frequency (Hz) for the 16-bit instruction: 10 to 32,767 Hz. For the 32-bit instruction: 10 to 200,000 Hz. The maximum speed must be multiples of 10, if not, the ones digit will be discarded.
Page 332 In order to ensure the output pulse values are correct, the ELC will fill in pulses as needed to keep any deviation to a minimum. 14. For ELC-PB, ELCB-PB series, PLSR instruction can be used twice in the program but the outputs cannot be repeated.
Page 333 E L C P r o g r a m m i n g M a n u a l 15. For ELC-PC/PV/PH series, there is no limit on the number of times this instruction can be used in the program. However, for ELC-PC/PA/PH series, two instructions can be executed at the same time;...
Page 334 17. If the set value falls out of the available range of operands, it will be automatically corrected with the available min. or max value. Program Example: (ELC-PB/PC/PA/PH/PV, ELCB-PB) When X0=ON, the maximum frequency of the PLSR instruction is 1,000Hz. D10 is the total quantity of output pulses, the accel/decel time is 3,000ms and pulses are sent out Y0.
Page 335 E L C P r o g r a m m i n g M a n u a l When X0 = OFF, the output will be interrupted, and when turned ON again, the pulses will restart at zero. PLSR K1000 K3000...
Page 336 3 . I n s t r u c t i o n S e t Note: When the PLSR instruction is used in a program, the outputs used in the PLSR instruction cannot be used in the PLSY instruction or PWM instruction. When several pulse output instructions (PLSY, PWM, PLSR) use Y0 as the pulse output in the same program, and if they are executed simultaneously in the same scan cycle, the ELC will perform the instruction with the fewest step numbers.
Page 337 E L C P r o g r a m m i n g M a n u a l frequency. The operands must be set before the execution of the instruction. All acceleration/deceleration instructions are included with the brake function. The brake function will be enabled when the ELC is performing acceleration and the switch contact is turned Off.
Page 338 3 . I n s t r u c t i o n S e t D1232: The number of output pulses for ramp-down stop when Y0 mark sensor receives signals. (LOW WORD). D1233: The number of output pulses for ramp-down stop when Y0 mark sensor receives signals.
Page 339 E L C P r o g r a m m i n g M a n u a l When the Mark signal is detected, M1108 = ON. The Y0 pulse output will pause during the ramp down process. Y0,Y2 relative parameters for Mask and Alignment Mark function: Parameter Ramp...
Page 340 3 . I n s t r u c t i o n S e t Frequency Y0 is ready for Y0 is masked from interrupts from X4 interrupts on X4 Target speed Pulse number if no external interrupt on X4 Start/end frequency Time...
Page 341 Description: The IST is a convenient instruction made specifically for the initial state of the step function control procedure. ELC-PB, ELCB-PB model, the range D and D = S20~S127 and D < D ELC-PC/PA/PH/PV...
Page 342 3 . I n s t r u c t i o n S e t initiates “auto operation”. Thus, there should be three circuits of these three initial state step points written first in the program. When switching to S1 (zero point return mode), zero point return won’t take any action once any of S10~S19 = ON.
Page 343 E L C P r o g r a m m i n g M a n u a l Manual operation mode: Collect balls Release balls X22 Y1 Raise robot arm Condition interlock X23 Y0 Lower robot arm X24 X4 Shift to right Condition interlock X25 X4...
Page 344 3 . I n s t r u c t i o n S e t Auto operation (step/one-cycle/continuous operation modes): a) SFC figure: M1041 M1044 M N 0 5 0 0 3 0 0 3 E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3 - 1 7 5...
Page 345 E L C P r o g r a m m i n g M a n u a l b) Ladder Diagram: M1041 M1044 Enter auto operation mode Lower robot arm X5 X0 Collect balls Raise robot arm to the upper-limit (X4 is ON) Shift to right Collect balls...
Page 346 3 . I n s t r u c t i o n S e t Flag explanation: M1040: Step point movement disabled. When M1040=ON, all movements of the step point are disabled. Manual operation mode: M1040 = ON. Zero point return mode/one cycle operation mode: Pressing the STOP button and pressing START button again, M1040 = ON.
Page 347 E L C P r o g r a m m i n g M a n u a l c) If executing from zero point return S1 to manual operation S0, no matter if M1045=ON or M1045=OFF, SET Y output will be reserved, and step point action will be cleared to OFF. M1046: When STL action = ON: If one of step point S is ON, M1046=ON.
Page 348 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Search a Data Stack , D, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T SER, SERP: 9 steps DSER, DSERP: 17 steps ELCB...
Page 349 E L C P r o g r a m m i n g M a n u a l Program Example: When X0=ON, the data stack D10~D19 is compared against D0 and the result is stored in D50~D54. If there are no equal values, the contents of D50~D52 will be 0. The offset into the data file of the largest value of all compared data will be stored in D54 and the offset into the data file of the smallest value of all compared data will be stored in D53.
Page 350 3 . I n s t r u c t i o n S e t Mnemonic Operands Function ABSD Absolute Drum Sequencer , D, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T ABSD: 9 steps DABSD: 17 steps ELCB...
Page 351 E L C P r o g r a m m i n g M a n u a l M10~ M13 = ON when the current value of C10 is equal to or greater than the lower-limit value and equal to or less than the upper-limit value. Lower-limit value Upper-limit value Current value of C10...
Page 352 3 . I n s t r u c t i o n S e t Mnemonic Operands Function INCD Incremental drum sequencer , D, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T INCD: 9 steps ELCB ELCM...
Page 353 E L C P r o g r a m m i n g M a n u a l When X0 turns from ON →OFF, C10 and C11 will both be reset to 0 and M10~M14 =OFF. When X0 turns ON again, this instruction will be executed again. M1013 K100 INCD...
Page 354 3 . I n s t r u c t i o n S e t Mnemonic Operands Function TTMR Alternate Timer D, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T TTMR: 5 steps ELCB ELCM...
Page 355 E L C P r o g r a m m i n g M a n u a l D1(unit: 100 ms) K0 (unit: s) 1×T D1=D0×10 K1 (unit: 100 ms) 10×T D1=D0 K2 (unit: 10 ms) 100×T D1=D0/10 Program Example 2: Using the TTMR instruction write preset values to 10 timers.
Page 356 3 . I n s t r u c t i o n S e t Mnemonic Operands Function STMR Special Timer S, m, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T STMR: 7 steps ELCB ELCM...
Page 357 E L C P r o g r a m m i n g M a n u a l reset to 0. STMR 5 sec 5 sec F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m M N 0 5 0 0 3 0 0 3 E 3 - 1 8 8...
Page 358 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Alternate ON/OFF Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T ALT, ALTP: 3 steps ELCB ELCM PC/PA/PH...
Page 359 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function RAMP Ramp variable Value , D, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T RAMP: 9 steps ELCB...
Page 360 3 . I n s t r u c t i o n S e t instruction completes a ramp cycle, the ramp complete bit M1029 will turn on. M1029 will reset when X20 turns off. Set the Start and End of ramp signal in D10 and D11. When X20 = ON, D10 increases towards D11, the current value of the ramp is stored in D12 and the number of current scans is stored in D13.
Page 361 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Data Transform and Move , D, m, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DTM: 9 steps ELCB...
Page 362 3 . I n s t r u c t i o n S e t Hi-byte Lo-byte Hi-byte Lo-byte Hi-byte Lo-byte Hi-byte Lo-byte k3: Transform 16-bit data (Lo-byte, Hi-byte) into 8-bit data in the following format: Hi-byte Lo-byte Hi-byte Lo-byte Hi-byte Lo-byte Hi-byte Lo-byte k4: Transform 8-bit HEX data into ASCII data (higher 4 bits, lower 4 bits) in the following format:...
Page 363 E L C P r o g r a m m i n g M a n u a l k6: Transform 8-bit ASCII data (higher 4 bits, lower 4 bits) into HEX data in the following format: (ASCII value to be transformed includes 0 ~ 9 (0x30~0x39), A ~ F (0x41~0x46), and a ~ f (0x61~0x66).) Hi-byte Lo-byte Hi-byte Lo-byte...
Page 364 3 . I n s t r u c t i o n S e t When the total of ramp-up and ramp-down time exceeds the total time for operation, the ELC will change the total time for operation (S+2) into “ramp-up time (S+3) + ramp-down time (S+4) + 1”...
Page 365 E L C P r o g r a m m i n g M a n u a l The optimal positioning results can be obtained below: Max frequency Start frequency D10, D11 K70000 K3334 F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m M N 0 5 0 0 3 0 0 3 E 3 - 1 9 6...
Page 366 3 . I n s t r u c t i o n S e t Mnemonic Operands Function SORT Data sort S, m , D, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T SORT: 11 steps DSORT: 21 steps ELCB...
Page 367 E L C P r o g r a m m i n g M a n u a l Example table of data sort Data numbers: m Data Column Column Students English Math. Physics Chemistry （D0）1 （D5）90 （D10）75 （D15）66 （D20）79 （D1）2 （D6）55 （D11）65 （D16）54 （D21）63 （D2）3...
Page 368 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Ten Key Input S ,D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T TKY: 7 steps DTKY: 13 steps ELCB...
Page 369 E L C P r o g r a m m i n g M a n u a l number key BCD value one digit number BCD code overflow BCD value BIN value The chart below has four keys connected to X35, X33, X30 and X31 of a number keyboard. After pressing the four keys in the following order, 1234, the number 5,301 will be entered into D0, one digit at a time.
Page 370 3 . I n s t r u c t i o n S e t Mnemonic Operands Function S ,D Hexadecimal Key Input Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T HKY: 9 steps DHKY: 17 steps ELCB...
Page 371 E L C P r o g r a m m i n g M a n u a l Number input: number key one digit number BCD code BCD value overflow BCD value BIN value Function key input: a) When the A key is pressed, M0=ON and latched. Next, press the D key and, M0=OFF, M3=ON and latched.
Page 372 3 . I n s t r u c t i o n S e t Points to note: When this instruction is executed, 8 scan time cycles are required to read the input values of the keys. If the scan cycle is too long or too short, it may cause the key values to be read incorrectly.
Page 373 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Digital Switch S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DSW: 9 steps ELCB ELCM...
Page 374 3 . I n s t r u c t i o n S e t operation start 0.1s 0.1s 0.1s 0.1s interrupt 0.1s 0.1s M1029 execution com pleted Transistor outputs must be used for Y20~Y23. Also, be sure that a diode is connected to every input terminal (0.1A/50V diode) as shown below.
Page 375 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function SEGD 7-segment Decoder S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T SEGD, SEGDP: 5 steps ELCB ELCM...
Page 376 Each time this instruction executes, it cycles through writing each group of outputs to the outputs for the 7-segment display, one at a time. For ELC-PB, ELCB-PB series controllers, the instruction can only be used once in the program. For ELC-PV series controllers, the instruction can be used twice in the program.
Page 377 The first group Points to note: ELC-PB, ELCB-PB series only provides a group of 4 digits for a 7-segment display and use 8 output points. The SEGL instruction only can be used once in the program and the usage range of operand n is 0 to 3.
Page 378 3 . I n s t r u c t i o n S e t output will be low voltage. step up resistor Y drive signal output Positive logic (Negative polarity) output of BCD code BCD value Y output (BCDcode) Signal output Negative logic (Positive polarity) output of BCD code BCD value...
Page 379 E L C P r o g r a m m i n g M a n u a l Parameter n set-points: Groups number of A group Two groups 7-segment display Y of BCD code outputs ＋－＋－...
Page 380 3 . I n s t r u c t i o n S e t Mnemonic Operands Function ARWS Arrow Key Input S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T ARWS: 9 steps ELCB ELCM...
Page 381 E L C P r o g r a m m i n g M a n u a l Pressing the up key to increase the value , the number will change from 0→1→2→…8→9→0 →1. Pressing the down key, the number will change from 0→9→8→…1→0→9. The changed value will be displayed on the 7-segment display.
Page 382 3 . I n s t r u c t i o n S e t Mnemonic Operands Function ASCII Code Conversion S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T ASC: 11 steps ELCB ELCM...
Page 383 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Outputs ASCII Code S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T PR: 5 steps ELCB ELCM...
Page 384 3 . I n s t r u c t i o n S e t Program Example 2: The PR instruction provides an 8 character serial string output operation. When M1027=OFF, a maximum of 8 character strings can be serially displayed on the outputs. When M1027=ON, a 1 to 16 character string will be serially displayed on the outputs.
Page 385 ELC-PV: 0 ~ 7, 100 ~ 107 (0-7 are right-side modules and 100-107 are left-side modules). Range of m (16-bit and 32-bit): for ELC-PB/PC/PA/PH, ELCB-PB: 0 ~ 48, for ELC-PV: 0 ~ 499, for ELCM-PH/PA: 0 ~ 255. Range of n: a) 16-bit: for ELC-PB/PC/PA/PH, ELCB-PB: 1 ~ (49 –...
Page 386 ELC-PV: 0 ~ 7, 100 ~ 107. (0-7 are right-side modules and 100-107 are left-side modules). Range of m (16-bit and 32-bit): for ELC-PB/PC/PA/PH, ELCB-PB: 0 ~ 48, for ELC-PV: 0 ~ 499, for ELCM-PH/PA: 0 ~ 255. Range of n: a) 16-bit: for ELC-PB/PC/PA/PH, ELCB-PB: 1 ~ (49 –...
Page 387 32-bit command when n=3 16-bit command when n=6 In ELC-PB, ELCB-PB models, flag M1083 is not available. When the FROM/TO instruction is executed, all interrupts (including external or internal interrupt subroutines) will be disabled. All interrupts will be executed after the FROM/TO instruction is completed. The, FROM/TO instruction can also be executed in an interrupt subroutine.
Page 388 3 . I n s t r u c t i o n S e t a) Write H0 to CR#1 of analog input module No. 0, which sets CH1 to mode 0 (voltage input: -10V to +10V). b) Write H0 to CR#33 and allow it to adjust the characteristics of CH1 to CH4. c) When X0 turns from OFF →ON, K0 OFFSET value will be written to CR#18 and K2000 GAIN value will be written to CR#24.
Page 389 During execution of the RS instruction, the data being sent cannot be changed. For Flags: M1120~M1131, M1140~M1143, M1161, see the examples below. The ELC-PB, ELCB-PB series do not support the index registers E, F. Program Example 1: COM2 RS-485 Enter data into the registers that start with D100 and set M1122=ON (send request-flag).
Page 390 3 . I n s t r u c t i o n S e t reset M1123. Reset it once each time the receive is complete. M1002 Setting communication protocol 9600, 7, E, 1 D1120 Communication protocol latched M1120 K100 D1129 Setting communication time out 100ms...
Page 391 E L C P r o g r a m m i n g M a n u a l The ELC will receive all data transmitted from the external equipment, including header and footer. 16-bit mode: Start and End Characters for the ELC to transmit are set by using M1126 and M1130 and the data must be entered into D1124~D1126.
Page 392 3 . I n s t r u c t i o n S e t When the data read is complete, M1314 will turn ON. When data processing on the received data is complete, M1314 must be reset (OFF) and the ELC will be ready for communication again.
Page 393 E L C P r o g r a m m i n g M a n u a l Program Example 4: COM3 RS-485 Only the 8-bit mode is supported (ELC sets M1161 = ON automatically) STX/ETX function (M1126/M1130/D1124~D1126) is not supported. The high byte of the 16-bit data is not available.
Page 394 3 . I n s t r u c t i o n S e t Receving data: (External equipment→ELC) D120L D121L D122L D123L D124L D125L D126L Registers for r eceived data, starting from lower 8 bits of D120 Length = 7 Points to note: ELC COM1 RS-232: Special bits (M-bits) and special registers (D-registers) used for communication instructions RS / MODRD...
Page 395 E L C P r o g r a m m i n g M a n u a l Special register Function COM1 (RS-232) communication protocol. Refer to the table in point D1036 number 4 below for the necessary settings. The specific end word to be detected for the RS instruction to execute an interruption request (I140) on COM1 (RS-232).
Page 396 3 . I n s t r u c t i o n S e t Flag Function Action Receiving data complete. When data is received via the RS instruction, M1123 will be ON. The received data can be processed System sets when M1123 is ON.
Page 397 E L C P r o g r a m m i n g M a n u a l Flag Function Action MODRD/MODWR/MODRW parameter error M1141 Supported communication instructions: System sets MODRD / MODWR/ MODRW ASCII / RTU mode selection. ON : RTU mode, OFF: ASCII mode. User sets M1143 Supported communication instructions:...
Page 398 3 . I n s t r u c t i o n S e t Special register Function COM2 (RS-485) Definition of first ending character (ETX1) D1125 Supported communication instruction: RS COM2 (RS-485) Definition of second ending character (ETX2) D1126 Supported communication instruction: RS COM2 (RS-485) Communication time-out setting (unit: ms).
Page 399 E L C P r o g r a m m i n g M a n u a l ELC COM3 RS-485: Special M-bits and D-registers for communication instructions RS / MODRW. Flag Function Action COM3 retain communication settings. Communication settings will be reset (changed) according to the content in D1109 after every scan cycle.
Page 400 3 . I n s t r u c t i o n S e t Special register Function Delay time of data response when the ELC is a SLAVE on COM2, COM3 RS-485 ports, Range: 0~10,000. (unit: 0.1ms). D1038 By using ELC LINK on COM2, D1038 can be set to send next communication data with delay.
Page 401 E L C P r o g r a m m i n g M a n u a l COM1 COM2 COM3 Function Description D1256 Store the sent data of MODRW instruction. D1295 Sending D1089 request Store the sent data of MODRD / MODWR / FWD / REV / STOP / RDST / RSTEF instruction D1099 M1313...
Page 402 3 . I n s t r u c t i o n S e t COM1 COM2 COM3 Function Description COM2 (RS-485) Error code returning from D1130 Errors Modbus communication Communication protocol settings: D1036(COM1 RS-232) / D1120(COM2 RS-485) / D1109(COM3 RS-485) Content Data Length...
Page 403 E L C P r o g r a m m i n g M a n u a l M1130 D1124: user defined D1124: H 0002 D1125: user defined D1125: H 0003 D1126: user defined D1126: H 0000 (no setting) D1124: user defined D1124: H 003ª...
Page 404 3 . I n s t r u c t i o n S e t interrupt COM Port I1□0 Special D COM1 I140 D1167 COM2 I150 D1168 COM3 I160 D1169 10. Take standard MODBUS format for example: ASCII mode Field Name Descriptions Start word = ‘: ’...
Page 405 E L C P r o g r a m m i n g M a n u a l ‘1’ ‘0’: write contents to multiple registers Data characters: The data sent by the user LRC checksum: LCR checksum is 2’s complement of the value added from Address to Data Characters. For example: 01H + 03H + 21H + 02H + 00H + 02H = 29H.
Page 406 3 . I n s t r u c t i o n S e t START/END: RTU Timeout Timer: Baud rate(bps) RTU timeout timer (ms) Baud rate (bps) RTU timeout timer (ms) 9,600 19,200 1,200 38,400 2,400 57,600 4,800 115,200 Address: 00 H: Broadcasting to all drives (Broadcast)
Page 407 E L C P r o g r a m m i n g M a n u a l Example: Read 2 continuous data words stored in the registers of the drive at address 01H (see the table below). The start register is at address 2102H Inquiry message: Response message: Field Name...
Page 408 3 . I n s t r u c t i o n S e t Timing diagram: SET M1122 X0 RS executes X20 Transmission ready M1121 Auto reset after transmitting completed Sending request M1122 User has to manually Receiving completed M1123 reset in program Receiving ready M1124 Reset the status to the initial...
Page 409 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function PRUN Parallel Run S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T PRUN, PRUNP: 5 steps DPRUN, DPRUNP: 9 steps ELCB...
Page 410 S and convert them to ASCII. Then, store the result into the low byte of D (high byte of D will be set to 0). Available range for Hex data: 0~9, A~F. ELC-PB, ELCB-PB series doesn’t support the index registers E, F. Program Example 1: When M1161=OFF, conversion mode is 16-bit.
Page 411 E L C P r o g r a m m i n g M a n u a l When n is 4, the bit structure is: D10=0123 H low byte high byte high byte low byte When n is 6, the bit structure is: D10 = H 0123 D11 = H 4567 0 0 1...
Page 412 3 . I n s t r u c t i o n S e t When n = 1 to 16: D20 low byte “3” “2” “1” “0” “7” “6” “5” “4” D20 high byte “3” “2” “1” “0” “7”...
Page 413 E L C P r o g r a m m i n g M a n u a l Program Example 2: When M1161=ON, conversion mode is 8-bit. When X0=ON, read four hexadecimal data characters starting from D10 and convert them to ASCII.
Page 414 3 . I n s t r u c t i o n S e t When n = 1 to 16: “3” “2” “1” “0” “7” “6” “5” “4” “3” “2” “1” “0” “7” “6” “5” “3” “2” “1” “0”...
Page 415 D. The number of converted ASCII codes is set by n. (high byte of D set to 0) Available range for Hex data: 0~9, A~F ELC-PB, ELCB-PB series doesn’t support the index registers E, F. Program Example 1: When M1161=OFF, it is 16-bit conversion mode.
Page 416 3 . I n s t r u c t i o n S e t Assume: ASCII code ASCII code conversion conversion D20 low byte H 43 “C” D24 low byte H 34 “4” D20 high byte H 44 “D”...
Page 417 E L C P r o g r a m m i n g M a n u a l Program Example 2: When M1161=ON, it is 16-bit conversion mode. M1000 M1161 Assume: ASCII code ASCII code conversion conversion H 43 “C”...
Page 418 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Check Code S, D, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T CCD, CCDP: 7 steps ELCB ELCM...
Page 419 E L C P r o g r a m m i n g M a n u a l Content of data(words) D0 low byte K100 = 0 1 1 0 0 1 0 0 D0 high byte K111 = 0 1 1 0 1 1 1 1 D1 low byte K120 = 0 1 1 1 1 0 0 0 D1 high byte K202 = 1 1 0 0 1 0 1 0 D2 low byte K123 = 0 1 1 1 1 0 1 1...
Page 420 3 . I n s t r u c t i o n S e t Mnemonic Operands Function VRRD Volume Read S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T VRRD, VRRDP: 5 steps ELCB ELCM...
Page 421 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function VRSC Volume Scale Read S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T VRSC, VRSCP: 5 steps ELCB ELCM...
Page 422 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Absolute Value Bit Devices Word devices Program Steps Type ABS, ABSP: 3 steps Y M S H KnX KnY KnM KnS T DABS, DABSP: 5 steps ELCB ELCM...
Page 423 This instruction will be executed when X0=ON and the result will be stored in D150. The instruction will not be executed when X0=OFF and the data will be unchanged. D100 D150 The timing chart for the PID instruction (ELC-PB/PC/PA/PH/PV, ELCB-PB max. operation time is 474us, ELCM-PH/PA max. operation time is 80us) Scan cycle Scan cycle...
Page 424 3 . I n s t r u c t i o n S e t Note2: The PID operation time without equation calculation (ELC-PB/PC/PA/PH/PV, ELCB-PB about 44us) (ELCM-PH/PA approx. 8us) Points to note: There is no limit on the number of times the PID instruction can be used in a program, but the addresses S +19 cannot be repeated.
Page 425 E L C P r o g r a m m i n g M a n u a l Device No. Function Set-point range Explanation 4: Exclusively for the adjusted temperature control (not avaliable in the 32-bit instruction). 5: Automatic mode with MV upper/lower bound control. When MV reaches upper/lower bound, the accumulation of integral value stops.
Page 426 3 . I n s t r u c t i o n S e t Device No. Function Set-point range Explanation +13: For system use only. +19: When a parameter setting exceeds its range, the upper / lower bound will be selected as the set value.
Page 427 E L C P r o g r a m m i n g M a n u a l Device No. Function Set-point range Explanation The proportion for minimizing the -30,000~30,000( derivative value (The rate of Derivative gain (K change of the process error).
Page 428 3 . I n s t r u c t i o n S e t Device No. Function Set-point range Explanation Ex: if S +9 is set as -1,000, the -2,147,483,648~ integral value will be -1,000 when Lower bound of integral +13, 14: value, 32-bit 2,147,483,647...
Page 429 E L C P r o g r a m m i n g M a n u a l 1 : Integral value of E(t) When is smaller than 0 as the control mode is selected as forward or inverse, will be regarded as “0"...
Page 430 3 . I n s t r u c t i o n S e t PID operation is within dotted area G(s) This equation is exclusively designed for temperature control. Therefore, when the sampling time (T ) is set to 4 seconds (K400), the range of output value (MV) will be K0 ~ K4,000 and the cycle time of the GPWM instruction used together has to be set as 4 seconds (K4000) as well.
Page 431 E L C P r o g r a m m i n g M a n u a l Notes and suggestion: + 3 can only be in the range 0 ~ 30,000. When the three main parameters are adjusted, K and K + 4 = K0 ~ K2), adjust K first...
Page 432 3 . I n s t r u c t i o n S e t Example 3: Block diagram for a temperature control application (S +4 = 1) Heating (MV) Temperature instruction (SV) Heater Temperature detection Actual temperature device (PV) Example 4: Adjusting PID parameters Assume that the transfer function of the controlled device G(S) in a control system is a first-order...
Page 433 E L C P r o g r a m m i n g M a n u a l PV=SV K =10,K =8,K =0.2 Time (sec) Application 1: PID instruction in pressure control system. (Use the block diagram in example 1) Control purpose: Enabling the control system to reach the target pressure.
Page 434 3 . I n s t r u c t i o n S e t Example program of SV ramp up function: M1002 > K-50 < > < D1116 Application 2: Speed control systems and pressure control systems operate separately (use the diagram of Example 2) Control purpose: After the speed control operates in open loop for a period of time, add a pressure control...
Page 435 E L C P r o g r a m m i n g M a n u a l M2=ON speed D1116 convert SV of drive speed voltage 0rpm 3000rpm convert to accel/decel M0=ON D1110 pressure SV of ramp-up meter pressure (optional)
Page 436 3 . I n s t r u c t i o n S e t Users may not be familiar with a new temperature environment. In this case, selecting auto-tuning (S +4 = K3) for an initial adjustment is suggested. After initial tuning is complete, the instruction will auto modify the control mode to the mode exclusively for adjusted temperature (S +4 = K4 ).
Page 437 E L C P r o g r a m m i n g M a n u a l Results of using adjusted parameters generated by initial auto-tuning function. From the figure above, we can see that the temperature control after auto-tuning is working fine and it used only approximately 20 minutes for the control.
Page 438 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Rising-edge Output Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T PLS: 3 steps ELCB ELCM PC/PA/PH...
Page 439 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Rising-edge Detection Operation Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T LDP: 3 steps ELCB ELCM...
Page 440 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Falling-edge Detection Operation Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T LDF: 3 steps ELCB ELCM PC/PA/PH...
Page 441 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function ANDP Rising-edge Series Connection Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T ANDP: 3 steps ELCB ELCM...
Page 442 3 . I n s t r u c t i o n S e t Mnemonic Operands Function ANDF Falling-edge Series Connection Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T ANDF: 3 steps ELCB ELCM PC/PA/PH...
Page 443 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Rising-edge Parallel Connection Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T ORP: 3 steps ELCB ELCM...
Page 444 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Falling-edge Parallel Connection Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T ORF: 3 steps ELCB ELCM PC/PA/PH...
Page 445 PC/PA/PH PH/PA Operands: : Timer number (T0~T255) : Preset value (K0~K32,767, ELC-PB, ELCB-PB: D0~D599, ELC-PC/PA/PH: D0~D4,999, ELC-PV, ELCM-PH/PA: D0~D9,999) Description: When the TMR instruction is executed, the timer is energized and will start timing. When the preset value of the timer is reached (accumulated value >= preset value), the timer done bit will be set. The timer done bit for any timer must use a bit instruction addressed with the timer number (T5 for example).
Page 446 PC/PA/PH PH/PA Operands: : 16 bit counter number (C0~C199) S : Preset value (K0~K32,767, ELC-PB, ELCB-PB: D0~D599, ELC-PC/PA/PH: D0~D4,999, ELC-PV, ELCM-PH/PA: D0~D9,999) Description: Each time the conditions preceding a CNT instruction transition from false-to-true, the counter will increment by one. When the accumulative value of a counter equals its Preset value, the counter done bit will turn on.
Page 447 DCNT is the instruction for the 32-bit high-speed counters that use counters C235 to C255. Counter numbers C200~C234 (all controllers except ELC-PB and ELCB-PB) are 32-bit up/down counters., the present value will count up (add 1) or count down (subtract 1) according to the flags M1200~M1234 set count mode when command DCNT is OFF The count direction is determined by M1200-M1234.
Page 448 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Inverse Operation Description Program Steps Invert the current result of the internal ELC operations INV: 1 steps ELCB ELCM PC/PA/PH PH/PA Description: Invert the state of the conditions preceding the INV Instruction.
Page 449 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Falling-edge Output Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T PLF: 3 steps ELCB ELCM...
Page 450 MODRD instruction. Refer to the RS instruction for more information. The RS instruction also uses COM2. 10. ELC-PB, ELCB-PB series doesn’t support the index registers E, F. M N 0 5 0 0 3 0 0 3 E F o r m o r e i n f o r m a t i o n v i s i t : w w w.
Page 451 E L C P r o g r a m m i n g M a n u a l Program Example 1: Communication between the ELC and MVX AC drives (ASCII Mode, M1143= OFF) M1002 D1120 Setting communication protocol 9600, 8, E, 1 Communication protocol latched M1120 Setting communication time out 100ms...
Page 452 3 . I n s t r u c t i o n S e t ELC receive message Register Data Descriptions D1070 low ‘0’ 30 H ADR 1 D1070 high ‘1’ 31 H ADR 0 D1071 low byte ‘0’ 30 H CMD 1 D1071 high byte...
Page 453 E L C P r o g r a m m i n g M a n u a l Program Example 2: Communication between ELC and MVX AC drive (RTU Mode, M1143= ON) M1002 Setting communication protocol 9600, 8, E, 1 D1120 Communication protocol latched M1120...
Page 454 3 . I n s t r u c t i o n S e t Register Data Descriptions D1077 low byte FE H CRC CHK Low D1078 low byte 5C H CRC CHK High Program Example 3: The ELC is connected to an MVX AC drive (ASCII Mode, M1143= OFF). If a message times-out occurs, retry the message.
Page 455 Refer to the RS instruction for more information. The RS instruction also uses COM2. ELC-PB, ELCB-PB series doesn’t support index registers E, F. F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m...
Page 456 3 . I n s t r u c t i o n S e t Program Example 1: Communication between the ELC and MVX AC drives (ASCII Mode, M1143= OFF) Program diagram M1002 Setting communication protocol 9600, 8, E, 1 D1120 Communication protocol latched M1120...
Page 457 E L C P r o g r a m m i n g M a n u a l ELC receive message Register Data Descriptions D1070 low ‘0’ 30 H ADR 1 D1070 high ‘1’ 31 H ADR 0 D1071 low ‘0’...
Page 458 3 . I n s t r u c t i o n S e t ELC transmit message Register Data Descriptions D1089 low 01 H Address D1090 low 06 H Function D1091 low 07 H Data address D1092 low 06 H D1093 low 17 H...
Page 459 E L C P r o g r a m m i n g M a n u a l M1002 Setting communication protocol to 9600, 8, E, 1 D1120 Communication protocol latched M1120 Setting communication timeout 100ms K100 D1129 Setting transmission request M1122 M1129...
Page 460 3 . I n s t r u c t i o n S e t Mnemonic Operands Function S, n, D LRC Generator Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T LRC, LRCP: 7 steps ELCB ELCM...
Page 461 E L C P r o g r a m m i n g M a n u a l Register Data Descriptions D111 low byte ‘0’ 30 H D112 low byte ‘6’ 36 H D113 low byte ‘E’ 45 H LRC CHK 0 LRC CHK (0,1) error check code D114 low byte...
Page 462 3 . I n s t r u c t i o n S e t Mnemonic Operands Function S, n, D CRC Generator Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T CRC, CRCP: 7 steps ELCB ELCM...
Page 463 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function ECMP Floating Point Compare Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DECMP, DECMPP: 13 steps ELCB...
Page 464 3 . I n s t r u c t i o n S e t Mnemonic Operands Function EZCP Floating Point Zone Compare , S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DEZCP, DEZCPP: 17 steps ELCB...
Page 465 DMOVR F1.200E+0 Remarks: DMOVR is a new instruction for V1.2 or later ELC-PB and ELCB-PB series controllers and for V1.2 of ELC-PC/PA/PH series controllers. F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m...
Page 466 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Degree Radian S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DRAD, DRADP: 9 steps ELCB ELCM PC/PA/PH...
Page 467 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Radian Degree S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DDEG, DDEGP: 9 steps ELCB ELCM...
Page 468 3 . I n s t r u c t i o n S e t Mnemonic Operands Function EBCD Floating to Scientific Conversion S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DEBCD, DEBCDP: 9 steps ELCB...
Page 469 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function S, D Scientific to Floating Conversion EBIN Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DEBIN, DEBINP: 9 steps ELCB...
Page 470 3 . I n s t r u c t i o n S e t Mnemonic Operands Function EADD Floating Point Addition Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DEADD, DEADDP: 13 steps ELCB ELCM...
Page 471 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function ESUB Floating Point Subtraction Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DESUB, DESUBP: 13 steps ELCB...
Page 472 3 . I n s t r u c t i o n S e t Program Example 2: When X2 = ON, the binary floating point value in D1/D0 will be subtracted from K1234 (automatically converted into binary floating point) and the result will be stored in D11/D10. K1234 DESUB M N 0 5 0 0 3 0 0 3 E...
Page 473 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function EMUL Floating Point Multiplication Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DEMUL, DEMULP: 13 steps ELCB...
Page 474 3 . I n s t r u c t i o n S e t Program Example 2: When X2 = ON, K1234 (automatically converted into binary floating point) is multiplied by the binary floating point value in D1/D0 and the result is stored in D11/D10.. DEMUL K1234 M N 0 5 0 0 3 0 0 3 E...
Page 475 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function EDIV Floating Point Division Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DEADD, DEADDP: 13 steps ELCB...
Page 476 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Floating Point Exponent Operation S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DEXP, DEXPP: 9 steps ELCB ELCM...
Page 477 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Floating Natural Logarithm Operation S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DEXP, DEXPP: 9 steps ELCB ELCM...
Page 478 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Floating Point Logarithm Operation Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DLOG, DLOGP: 13 steps ELCB ELCM PC/PA/PH...
Page 479 E L C P r o g r a m m i n g M a n u a l M1081 DFLT DFLT DLOG DEBCD F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m M N 0 5 0 0 3 0 0 3 E 3 - 3 1 0...
Page 480 3 . I n s t r u c t i o n S e t Mnemonic Operands Function ESQR Floating point Square Root S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DESQR, DESQRP: 9 steps ELCB...
Page 481 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Floating Point Power Operation Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DPOW, DPOWP: 13 steps ELCB...
Page 482 3 . I n s t r u c t i o n S e t M1081 DFLT DFLT DPOW DEBCD M N 0 5 0 0 3 0 0 3 E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3 - 3 1 3...
Page 483 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Floating Point to Integer S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T INT, INTP: 5 steps DINT, DINTP: 9 steps ELCB...
Page 484 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Floating Point Sine Operation S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DSIN, DSINP: 9 steps ELCB ELCM...
Page 485 E L C P r o g r a m m i n g M a n u a l Program Example 2: When M1018= OFF, the radian mode is used. Select an angle of 30 degrees with X0 or 60 degrees with X1 and convert the angle to a RAD value to calculate the SIN.
Page 486 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Floating Point Cosine Operation S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DCOS, DCOSP: 9 steps ELCB ELCM...
Page 487 E L C P r o g r a m m i n g M a n u a l Program Example 2: When M1018= ON, it is angle mode. When X0= ON, take the COS of the angle specified in (D1, D0) and store the result in (D11, D10) in the binary floating point format.
Page 488 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Floating Point Tangent Operation S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DTAN, DTANP: 9 steps ELCB ELCM...
Page 489 E L C P r o g r a m m i n g M a n u a l π RAD value(degree x / 180) binary floating point TAN value binary floating point Program Example 2: When M1018= ON, it is angle mode. When X0= ON, take the TAN of the angle specified by (D1, D0) and store the result in (D11, D10) in the binary floating point format.
Page 490 3 . I n s t r u c t i o n S e t Mnemonic Operands Function ASIN Floating Point Arcsine Operation S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DASIN, DASINP: 9 steps ELCB ELCM...
Page 491 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function ACOS Floating Point Arccosine Operation S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DACOS, DACOSP: 9 steps...
Page 492 3 . I n s t r u c t i o n S e t Mnemonic Operands Function ATAN Floating Point Arctangent Operation S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DATAN, DATANP: 9 steps ELCB...
Page 493 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function SINH Hyperbolic Sine S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DSINH, DSINHP: 9 steps ELCB ELCM...
Page 494 3 . I n s t r u c t i o n S e t Mnemonic Operands Function COSH Hyperbolic Cosine S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DCOSH, DCOSHP: 9 steps ELCB...
Page 495 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function TANH Hyperbolic Tangent S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DTANH, DTANHP: 9 steps ELCB...
Page 496 3 . I n s t r u c t i o n S e t Mnemonic Operands Function DELAY Delay Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DELAY, DELAYP: 3 steps ELCB ELCM PC/PA/PH...
Page 497 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function GPWM General PWM Output Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T GPWM: 7 steps ELCB ELCM...
Page 498 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Fuzzy Temperature Control Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T FTC: 9 steps ELCB ELCM PC/PA/PH...
Page 499 E L C P r o g r a m m i n g M a n u a l Notes: The settings for S are as follows: Device Function Usage range Explanation When T is less than the scan time of the program, the PID instruction will execute for one scan time.
Page 500 3 . I n s t r u c t i o n S e t Example 1: control diagram GPWM Fuzzy instruction Controller Temperature PT modular Sensor The output D22 (MV) of the FTC instruction is used as the input to the GPWM instruction. D22 represents the pulse output width and D30 is the pulse output cycle.
Page 501 E L C P r o g r a m m i n g M a n u a l Example 2: This example application requires rapid heating. Use D13=k16 due to overshoot. The result after testing is shown as follows. From the plot above, there is no overshoot but it takes more than one hour and fifteen minutes to ±...
Page 502 3 . I n s t r u c t i o n S e t M N 0 5 0 0 3 0 0 3 E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3 - 3 3 3...
Page 503 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Valve Control Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T CVM: 7 steps ELCB ELCM...
Page 504 3 . I n s t r u c t i o n S e t a) When Y0 and Y1 = Off: No valve action b) When Y0 = On and Y1 = Off: Valve “open” c) When Y0 = Off and Y1 = On: Valve “closed” d) When Y0 and Y1 = On: The action is prohibited.
Page 505 E L C P r o g r a m m i n g M a n u a l Program Example 2: 1. Timing diagram and program control: 4sec 5sec 2sec D0=k-1 D0=k40 D0=k10 2. Control phases: Phase : When M0 = On, because the valve position is not known, set D0 = K-1 to deliberately close the valve (Y0 = Off, Y1 = On) for 5 seconds and make sure the valve is at the position of 0 seconds before moving on to the next step.
Page 506 3 . I n s t r u c t i o n S e t Mnemonic Operands Function SWAP Swap High/Low Byte Bit Devices Word devices Program Steps Type SWAP, SWAPP: 3 steps Y M S H KnX KnY KnM KnS T DSWAP, DSWAPP: 5 steps ELCB...
Page 507 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function MEMR File Memory Read m, D, n Bit Devices Word devices Program Steps Type MEMR, MEMRP: 7 steps Y M S H KnX KnY KnM KnS T DMEMR, DMEMRP: 13...
Page 508 3 . I n s t r u c t i o n S e t Mnemonic Operands Function MEMW File Memory Write S, m, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T MEMW, MEMWP: 7 steps DMEMW, DMEMWP: 13 steps ELCB...
Page 509 E L C P r o g r a m m i n g M a n u a l ELC-PC/PA/PH series, when the value of D1101 is less than 0 or more than 1,599, or the value of D1103 is less than 2,000 or more than 4,999, reading data from file register to data register is disabled.
Page 510 S: Internal address to store a read message reply or to store write data to be sent n: Length of read/write data. Description: ELC-PB/PV/PA/PH/PV, ELCB-PB series, the MODRW instruction supports communications on COM2 (RS-485). ELCM-PH/PA series, the MODRW instruction supports communications on COM1 (RS-232), COM2 (RS-485) and COM3 (RS-485).
Page 511 MODRW instruction is sending a write command. The actual data from a read reply will be in D1296-D1311. n: Read/Write data length. For ELC-PB/PC/PA/PH series, if M1143=ON (RTU Mode), n=K1~K16; when M1143=OFF (ASCII Mode), n=K1~K8. For ELC-PV series, n=K1~K16. n: Read/Write data length. (ELCM-PH/PA)
Page 512 3 . I n s t r u c t i o n S e t In ASCII or RTU mode, when the ELC’s COM2 sends a read message, the data in the reply will be stored in D1296~D1311. The data sent with a write message will be stored in registers D1256~D1295 (the data should be placed into the D-register address in the instruction).
Page 513 E L C P r o g r a m m i n g M a n u a l Register Data Descriptions D1260 Low ‘0’ 30 H D1260 High ‘0’ 30 H Number of Data bits D1261 Low ‘1’ 31 H D1261 High ‘0’...
Page 514 3 . I n s t r u c t i o n S e t Register Data Descriptions D1260 Low 00 H Number of Data (count by word) D1261 Low 10 H D1262 Low 79 H CRC CHK Low D1263 Low 0A H CRC CHK High...
Page 515 E L C P r o g r a m m i n g M a n u a l M1002 D1109 Set communication protocol as 9600, 8, E,1 Retain communication setting M1136 Set receiving timeout as 100ms K100 D1252 M132 0 = ON M1320 = OFF, M1320...
Page 516 3 . I n s t r u c t i o n S e t ELC2 ELC1, ELC1 receives: “01 02 02 34 12 2F 75” ELC data receiving register: Register Data Descriptions ELC converts the data in address 0500H ~ 0515H and stores the 1234 H converted data automatically.
Page 517 E L C P r o g r a m m i n g M a n u a l For ASCII or RTU mode, ELC COM2 stores the data to be sent in D1256~D1295, and stores the command reply in registers starting from S, and stores the converted 16-bit data in D1296 ~ D1311.
Page 518 3 . I n s t r u c t i o n S e t ELC transmits data register (transmit message) Register Data Descriptions D1256 Low byte ‘0’ 30 H ADR 1 ADR (1,0) is MVX drive address D1256 High byte ‘1’...
Page 519 E L C P r o g r a m m i n g M a n u a l Register Data Descriptions D9 low byte ‘0’ 30 H ELC automatically converts D9 high byte ‘0’ 30 H Content of ASCII codes to hex and store D10 low byte ‘0’...
Page 520 3 . I n s t r u c t i o n S e t Register Data Descriptions D5 low byte 05 H Content of ELC automatically store the D6 low byte 03 H address 0709 H value in D1297 = 0503 H D7 low byte 0B H Content of...
Page 521 E L C P r o g r a m m i n g M a n u a l M 1002 D1109 Set communication protocol as 9600, 8, E,1 Retain communication setting M1136 M OV K100 D1252 Set communication timeout as 100ms M1320 = ON M1320 = OFF M1320...
Page 522 3 . I n s t r u c t i o n S e t RTU mode (COM3: M1320 = ON COM1: M1139 = ON): When X0 = ON, MODRW instruction executes the function specified by Function Code 03 the drive, ELC sends: ”...
Page 523 E L C P r o g r a m m i n g M a n u a l M1002 Set communication protocol as 9600,8,E,1 D1120 Retain communication prot oc ol M1120 Set receiving timeout as 100ms K100 D1129 M1143 = ON M1143 = OFF M1143...
Page 524 3 . I n s t r u c t i o n S e t Received data Register Data Descriptions D1070 low byte ‘0’ 30 H ADR 1 D1070 high byte ‘1’ 31 H ADR 0 D1071 low byte ‘0’...
Page 525 E L C P r o g r a m m i n g M a n u a l Register Data Descriptions D1074 Low byte FF H Data content (ON = FF00H) D1075 Low byte 00 H D1076 Low byte 8C H CRC CHK Low D1077 Low byte...
Page 526 3 . I n s t r u c t i o n S e t ELC1 ELC2, ELC sends: “01 05 0500 FF00 6F” ELC2 ELC1, ELC receives: “01 05 0500 FF00 6F” (No data processing on received data) RTU mode (COM3: M1320 = ON, COM1: M1139 = ON): When X0 = ON, MODRW instruction executes the function specified by Function Code 05 ELC1...
Page 527 E L C P r o g r a m m i n g M a n u a l M1002 Setting communication protocol 9600, 8, E, 1 D1120 Communication protocol latched M1120 Setting communication timeout 100ms K100 D1129 RTU mode setting M1143 Setting sending request M1122...
Page 528 3 . I n s t r u c t i o n S e t Data received Register Data Descriptions D1070 Low byte ‘0’ 30 H ADR 1 D1070 High byte ‘1’ 31 H ADR 0 D1071 Low byte ‘0’...
Page 529 E L C P r o g r a m m i n g M a n u a l Register Data Descriptions D1076 Low byte 66 H CRC CHK Low D1077 Low byte AB H CRC CHK High Program example 8: COM1 (RS-232) / COM3 (RS-485), Function Code H06 Function code K6 (H06): Write single Word.
Page 530 3 . I n s t r u c t i o n S e t ASCII mode (COM3: M1320 = OFF, COM1: M1139 = OFF): When X0 = ON, MODRW instruction executes the function specified by Function Code 06 the drive , ELC sends: “01 06 0706 1770 65”...
Page 531 E L C P r o g r a m m i n g M a n u a l M1002 Set communication protocol as 9600, 8, E, 1 D1120 Retain communication protocol M1120 Set receiving timeout as 100ms K100 D1129 M1143 = ON M1143 = OFF...
Page 532 3 . I n s t r u c t i o n S e t Register Data Descriptions D1263 Low byte ‘3’ 33 H D1263 High byte ‘4’ 46 H 1234H Data contents Content of register D0 D1264 Low byte ‘1’...
Page 533 E L C P r o g r a m m i n g M a n u a l Register Data Descriptions D1263 Low byte 34 H Data content 1 Content of D0: H34 D1264 Low byte 12 H Data content 2 Content of D1: H12 D1265 Low byte...
Page 534 3 . I n s t r u c t i o n S e t M1002 Set communication protocol as 9600, 8, E, 1 D1109 Retain communication protocol M1136 Set receiving timeout as 100ms K100 D1252 M1320 = ON M1320 = OFF M1320 M1320...
Page 535 E L C P r o g r a m m i n g M a n u a l Received data from the drive will be stored in registers D1070~D1077. After receiving a response, the ELC automatically checks if the received data is correct. If there is any fault, M1140 = ON.
Page 536 3 . I n s t r u c t i o n S e t ELC transmit data Register Data Descriptions D1256 Low byte ‘0’ 30 H ADR 1 ADR (1,0) is MVX drive address D1256 High byte ‘1’ 31 H ADR 0 D1257 Low byte...
Page 537 E L C P r o g r a m m i n g M a n u a l Register Data Descriptions D1074 Low byte ‘0’ 30 H D1074 High byte ‘0’ 30 H Number of Register D1075 Low byte ‘0’...
Page 538 3 . I n s t r u c t i o n S e t Program example 12: COM1 (RS-232) / COM3 (RS-485), Function Code H10 Function code K16 (H10): Write multiple words. Up to 16 Words can be written. The message data between ELC COM3 and the drive is shown in the tables below.
Page 539 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Detection of Input Pulse Width S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T PWD: 5 steps ELCB...
Page 540 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Start of the Measurement of Execution Time of I RTMU S, D Interruption Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T RTMU: 5 steps ELCB...
Page 541 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function End of the Measurement of the Execution Time RTMD of I Interrupt Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T...
Page 542 3 . I n s t r u c t i o n S e t Mnemonic Operands Function RAND Random Number Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T RAND, RANDP: 7 steps DRAND, DRANDP: 13 steps ELCB...
Page 543 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function S, D Absolute Position Read ABSR Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DABSR: 13 steps ELCB ELCM...
Page 544 3 . I n s t r u c t i o n S e t registers (D1350, D1351) corresponding to CH1 pulse, so it is recommended to use these two registers. If other registers are used, the data will need to be transmitted into the current value registers (D1348, D1349) corresponding to CH0 pulse or the current value registers (D1350, D1351) corresponding to CH1 pulse.
Page 545 E L C P r o g r a m m i n g M a n u a l SERVO ON ABS data ABSM mode transmitting Transmitting output data ready ABS data ABSR Controller output request ABS(bit 1) output ABS(bit 0) output Current value position data 32-bit...
Page 546 3 . I n s t r u c t i o n S e t M1103: (For ELC-PH series) M1103=ON after the second group of pulse (Y11) outputs are complete. M1258: (For ELC-PV series) M1258=ON after the first group of (Y0, Y1) output reverse pulses. M1259: (For ELC-PV series) M1259=ON after the second group of (Y2, Y3) output reverse pulses.
Page 547 E L C P r o g r a m m i n g M a n u a l Range of settings: For ELC-PV series, the speed must be higher than 10Hz. Frequencies lower than 10Hz or higher than maximum output frequency result in 10Hz pulses being sent. The default setting in ELC-PV series is 200Hz.
Page 548 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Zero Return Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DZRN: 17 steps ELCB ELCM PC/PA/PH...
Page 549 E L C P r o g r a m m i n g M a n u a l the position of the machine at any time. However, the data may be lost when power to the ELC is turned off. Therefore, the machine should execute a zero point return at power up. Flag: For the description of M1010, M1029, M1102, M1103, M1334, M1335, M1336, M1337, M1346, refer to the ABSR (API 155) instruction.
Page 550 3 . I n s t r u c t i o n S e t Description of the zero point return operation: When the ZRN instruction is executed, accelerate to Zero point return speed S and start to move; Y10 and Y11 will use S2 as the initial frequency. For the ELC-PV and ELC-PH series, the accel/decel time is set by Y10 (D1343) and Y11 (D1353).
Page 551 E L C P r o g r a m m i n g M a n u a l The ELC-PH, when the ZRN instruction is executed, the current value of the pulse output frequency will be in (D1348, D1349) and (D1350, D1351). After the ZRN instruction is complete, 0 will be in (D1348, D1349) and (D1350, D1351).
Page 552 3 . I n s t r u c t i o n S e t The left limit switch for CH0 (Y0, Y1) is X5; the left limit switch for CH1 (Y2, Y3) is X7. Channel CH0(Y0,Y1) CH1(Y2,Y3) Input DOG point Left limit switch (M1307 = ON) Reverse pulse output direction...
Page 553 E L C P r o g r a m m i n g M a n u a l Output in reverse End flag M1029/M1102 DOG switch: X4/X6 Freq. JOG freq. Time Start DOG switch OFF Mode 3: Current position at left side of zero point, pulse output in reverse, limit switch enabled. Forward Reverse Reverse...
Page 554 3 . I n s t r u c t i o n S e t Mnemonic Operands Function PLSV Adjustable Speed Pulse Output S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T PLSV: 7 steps DPLSV: 13 steps ELCB...
Page 555 E L C P r o g r a m m i n g M a n u a l Description: (ELCM-PH/PA) S is the designated pulse output frequency. Available range: -100,000Hz ~ +100,000 Hz. “+/-” signs indicate forward/reverse output direction. The frequency can be changed during pulse output execution.
Page 556 3 . I n s t r u c t i o n S e t Mnemonic Operands Function DRVI Relative Position Control Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DDRVI: 17 steps ELCB ELCM PC/PA/PH...
Page 557 E L C P r o g r a m m i n g M a n u a l word) of CH3 (Y5, Y6). - When in the reverse direction, the contents in the present value register will decrease. For ELC-PH series, the numbers of pulses will be stored in the current value register (D1348 high byte, D1349 low byte) for CH0(Y10) or the current value register (D1350 high byte, D1351 low byte) for CH1(Y11).
Page 558 3 . I n s t r u c t i o n S e t DDRVI K20000 K2000 Points to note: Relative position control: Using a positive or a negative value to specify travel distance from the current position is also a way of doing relative position control. a) PH series +3,000 F0 1st step acceleration...
Page 559 E L C P r o g r a m m i n g M a n u a l Factory setting: 100,000Hz Max. speed Sample time of acceleration Y10(D1348,D1349) Y11(D1350,D1351) Acceleration slope Acceleration Deceleration Y10(D1340) Y10 (D1340) Y11(D1352) Y11 (D1352) Output pulse frequency Min value: 100Hz Min value: 100Hz...
Page 560 3 . I n s t r u c t i o n S e t M1335: CH1 pulse output stops. M1336: CH0 sending pulses” indication. M1337: CH1 sending pulses” indication. M1520: CH2 pulse output stops. M1521: CH3 pulse output stops. M1522: CH2 sending pulses”...
Page 561 E L C P r o g r a m m i n g M a n u a l D1343: D1343 operates as the acceleration/deceleration time setting of the first step acceleration and the last step deceleration of the first output Y10 when the position control instructions (API 156 ZRN, API 158 DRVI, API 159 DRVA) are executed.
Page 562 3 . I n s t r u c t i o n S e t bits; other bits are invalid. K0: Y6 output 12. K1: Y6, Y7 AB-phase output; A ahead of B. 13. K2: Y6, Y7 AB-phase output; B ahead of A. 14.
Page 563 E L C P r o g r a m m i n g M a n u a l The operation of D corresponds to the “+” or “-“of S. When S is “+”, D will be OFF; when S is “-“, D will be ON.
Page 564 3 . I n s t r u c t i o n S e t +3,000 Ramp up time Ramp down time Start / End freq. Min: 6Hz Current position -3,000 Registers for setting ramp up/down time and start/end frequency: a) Output Y0: Sample time of ramp-up...
Page 565 E L C P r o g r a m m i n g M a n u a l M1347: Auto-reset Y0 when high speed pulse output complete M1524: Auto-reset Y2 when high speed pulse output complete M1534: Enable ramp-down time setting on Y0. Has to be used with D1348 M1535: Enable ramp-down time setting on Y2.
Page 566 3 . I n s t r u c t i o n S e t Mnemonic Operands Function DRVA Absolute Position Control Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DDRVA: 17 steps ELCB ELCM PC/PA/PH...
Page 567 E L C P r o g r a m m i n g M a n u a l word) for CH2 (Y4, Y5). - The 32-bit data stored in the present value registers D1378 (high word) and D1377 (low word) for CH3 (Y5, Y6).
Page 568 3 . I n s t r u c t i o n S e t Program Example: When M10=ON, it will output 20,000 pulses from Y10 with 2KHz frequency. Y0=ON indicates positive direction. DDRVA K20000 K2000 Points to note: ELC-PV series: a) Absolute position control: The travel distance starting from the zero point (0);...
Page 569 E L C P r o g r a m m i n g M a n u a l b) Settings for absolute position and operation speed: (D1343 (D1353) is the acceleration/deceleration time setting of the first step acceleration and last step deceleration of Y10(Y11).
Page 570 3 . I n s t r u c t i o n S e t PH Series + Ex16 Mitsubishi Servo Drive MR-J2 series 220VAC Servo motor 3-phase power 220VAC CN1A +24V CN1B Start Zero point reset JOG(+) CN1B JOG( - ) Stop Error reset...
Page 571 E L C P r o g r a m m i n g M a n u a l Wiring of the ELC-PV series and a Mitsubishi MR-J2-□A Servo drive: PV Series Mitsubishi Servo Drive MR-J2 series 220VAC Servo motor 3-phase power 220VAC CN1A...
Page 572 3 . I n s t r u c t i o n S e t a) Pulse + DIR (recommended) Pulse b) CW/CCW (limited frequency at 10KHz) c) A/B-phase output (limited frequency at 10KHz) For ELC-PV series, when the Y0 output is used with many high-speed pulse output instructions (PLSY, PWM, PLSR) and position control instructions (ZRN, PLSV, DRVI, DRVA) in a program and these instructions are executed synchronously in the same program scan, the ELC will execute the instruction with the fewest step numbers.
Page 573 E L C P r o g r a m m i n g M a n u a l - The current position (32-bit data) of CH0 (Y0, Y1) which is stored in D1031(high), D1030 (low) - The current position (32-bit data) of CH1 (Y2, Y3) which is stored in D1337(high), D1336 (low).
Page 574 3 . I n s t r u c t i o n S e t Registers for setting ramp up/down time and start/end frequency: a) Output Y0: Sample time of ramp-up Pulse output frequency Ramp-up slope End freq. Start freq. Y0 (D1340) Y0(D1340) Min: 6Hz...
Page 575 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function TCMP Calendar Compare , S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T TCMP, TCMPP: 11 steps ELCB ELCM...
Page 576 3 . I n s t r u c t i o n S e t Program Example: When X0= ON, the instruction is executed and the current time of the calendar is placed in (D20~D22) and is compared to the value 12:20:45 and the result is shown at M10~M12. When X0 goes from ON→OFF, the instruction stops executing, but the ON/OFF state of M10~M12 is unchanged..
Page 577 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function TZCP Calendar Zone Compare , S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T TZCP, TZCPP: 9 steps ELCB...
Page 578 3 . I n s t r u c t i o n S e t Program Example: When X0= ON, the instruction is executed and one of M10~M12 = ON. When X0=OFF, the instruction is not executed but the state of M10~M12 remain unchanged. TZCP ON when D0 Hour...
Page 579 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function TADD Calendar Data Addition Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T TADD, TADDP: 7 steps ELCB ELCM...
Page 580 3 . I n s t r u c t i o n S e t Mnemonic Operands Function TSUB Calendar Data Subtraction Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T TSUB, TSUBP: 7 steps ELCB ELCM PC/PA/PH...
Page 581 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Calendar Data Read Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T TRD, TRDP: 3 steps ELCB ELCM...
Page 582 3 . I n s t r u c t i o n S e t → D1314 Minute 0~59 Minute → D1313 Second 0~59 Second Notes: The best method for setting the RTC is to use the TWR (API 167) instruction. To display a four digit number for the year: By default, ELC controllers display a 2 digit number for the year (for example: displays 03 for year 2003).
Page 583 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Calendar Data Write In Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T TWR, TWRP: 5 steps ELCB ELCM...
Page 584 3 . I n s t r u c t i o n S e t the seconds of the clock is 1~29 seconds, the seconds value will be automatically set to “0” (zero) seconds and the minutes will not change. If the seconds of the clock are between 30~59 seconds, the seconds value will be automatically set to “0”...
Page 585 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Masked Move Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T MVM, MVMP: 7 steps DMVM, DMVMP: 13 steps...
Page 586 3 . I n s t r u c t i o n S e t Mnemonic Operands Function HOUR Hour Meter S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T HOUR: 7 steps DHOUR: 13 steps ELCB...
Page 587 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function BIN → GRAY CODE S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T GRY, GRYP: 5 steps DGRY, DGRYP: 9 steps ELCB...
Page 588 3 . I n s t r u c t i o n S e t Mnemonic Operands Function GRAY CODE → BIN GBIN S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T GBIN, GBINP: 5 steps DGBIN, DGBINP: 9 steps ELCB...
Page 589 Description: 1. S and S are Floating point numbers 2. ELC-PB, ELCB-PB series models do not support index register E and F. 3. The DADDR operands, S and S can each be 2 D-register addresses or actual floating point values (e.g. F1.2).
Page 590 Description: 1. S and S are Floating point numbers 2. ELC-PB, ELCB-PB series models do not support index register E and F. 3. The DSUBR operands, S and S can each be 2 consecutive D-register addresses or actual floating point values (e.g. F1.2).
Page 591 Description: 1. S and S are Floating point numbers 2. ELC-PB, ELCB-PB series models do not support index register E and F. 3. The DMULR operands, S and S can each be 2 consecutive D-register addresses or actual floating point values (e.g. F1.2).
Page 592 Description: 1. S and S are Floating point numbers 2. ELC-PB, ELCB-PB series models do not support index register E and F. 3. The DDIVR operands, S and S can each be 2 consecutive D-register addresses or actual floating point values (e.g. F1.2).
Page 593 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function 16-bit→32-bit Conversion MMOV S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T MMOV, MMOVP: 5 steps ELCB ELCM...
Page 594 3 . I n s t r u c t i o n S e t Mnemonic Operands Function GPS Data Receiving S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T GPS: 5 steps ELCB ELCM...
Page 595 E L C P r o g r a m m i n g M a n u a l Content Range Format Note D + 5 North / South 0 or 1 Word 0(+) North, 1(-) South Longitude 0 ~ 180 Float Unit: ddd.mmmmmm D + 6~7...
Page 596 3 . I n s t r u c t i o n S e t M1312 M1314 M1315 When the instruction finishes execution, M1314 = ON. If it fails, M1315 = ON. The data will be stored in addresses beginning with D0. Content Content Hour...
Page 597 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function Solar Cell Positioning S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DSPA: 9 steps ELCB ELCM...
Page 598 3 . I n s t r u c t i o n S e t Content Range Format Note D + 2~3 Azimuth 0 ~ 360 Float North point=0 Incidence 0 ~ 90 Float D + 4~5 D + 6 Converted DA value of Zenith 0 ~ 2000 Word...
Page 599 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function WSUM Sum of Multiple Devices S, D, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T WSUM, WSUMP: 7 steps DWSUM, DWSUMP: 13...
Page 600 3 . I n s t r u c t i o n S e t Mnemonic Operands Function MAND Matrix AND , D, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T MAND, MANDP: 9 steps ELCB ELCM...
Page 601 E L C P r o g r a m m i n g M a n u a l F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m M N 0 5 0 0 3 0 0 3 E 3 - 4 3 2...
Page 602 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Matrix OR , D, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T MOR, MORP: 9 steps ELCB ELCM...
Page 603 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function MXOR Matrix XOR , D, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T MXOR, MXORP: 9 steps ELCB ELCM...
Page 604 3 . I n s t r u c t i o n S e t Mnemonic Operands Function MXNR Matrix XNR , D, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T MXNR, MXNRP: 9 steps ELCB ELCM...
Page 605 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function MINV Matrix Inverse S, D, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T MINV, MINVP: 7 steps ELCB ELCM...
Page 606 3 . I n s t r u c t i o n S e t Mnemonic Operands Function MCMP Matrix Compare , n, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T MCMP, MCMPP: 9 steps ELCB ELCM...
Page 607 E L C P r o g r a m m i n g M a n u a l MCMPP Pointer MCMP Description of the flags: M1088: Matrix comparison flag, if M1088=1, the result of the comparison is equal, otherwise M1088=0.
Page 608 3 . I n s t r u c t i o n S e t Mnemonic Operands Function MBRD Matrix Bit Read S, n, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T MBRD, MBRDP: 7 steps ELCB ELCM...
Page 609 E L C P r o g r a m m i n g M a n u a l Description of the flags: M1089: Matrix search end flag, when reaching the last bit, M1089=1. M1092: Matrix pointer error flag, the pointer exceeds its range, M1092=1. M1093: Matrix pointer increase flag, when set, add 1 to the present pointer.
Page 610 3 . I n s t r u c t i o n S e t Mnemonic Operands Function MBWR Matrix Bit Write S, n, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T MBWR, MBWRP: 7 steps ELCB ELCM...
Page 611 E L C P r o g r a m m i n g M a n u a l Before Execution M1096 (Matrix shift/input complement flag) Pointer After Execution Pointer Description of the flags: M1089: Matrix search end flag, when reaching the last bit, M1089=1. M1092: Matrix pointer error flag, the pointer exceeds its range, M1092=1.
Page 612 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Matrix Bit Shift S, D, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T MBS, MBSP: 7 steps ELCB ELCM...
Page 613 E L C P r o g r a m m i n g M a n u a l M1096 Before Execution M1095 M1097=0 After shifting to left M1095 Program Example 2: When X1=ON, M1097=ON means shift the matrix to the right by one bit for each false-to-true transition of the instruction.
Page 614 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Matrix Bit Rotator S, D, n Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T MBR, MBRP: 7 steps ELCB ELCM...
Page 615 E L C P r o g r a m m i n g M a n u a l Before Execution M1095 M1097=0 After rotating to left M1095 Program Example 2: When X1=ON, M1097=ON means shift the matrix to the right by one bit for each false-to-true transition of the instruction.
Page 616 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Matrix Bit State Count S, n, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T MBC, MBCP: 7 steps ELCB ELCM...
Page 617 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function PPMR 2-Axis Relative Point to Point Motion , S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DPPMR: 17 steps...
Page 618 3 . I n s t r u c t i o n S e t When 2-axis synchronous motion instruction enabled, start frequency acceleration/deceleration time for the Y axis will be the same as the settings for the X axis. The number of output pulses for the 2-axis motion shall not be less than 59;...
Page 619 E L C P r o g r a m m i n g M a n u a l D202 K100000 DPPMR D200 = D0 K1 D206 K100000 DPPMR D204 = D0 K2 DPPMR D208 D210 K100000 = D0 K3 DPPMR D212 D214...
Page 620 3 . I n s t r u c t i o n S e t Points to note: 1. ELC-PV Flag descriptions: M1029 : On when the 1 group of 2-axis motion is complete. M1036 : On when the 2 group of 2-axis motion is complete.
Page 621 E L C P r o g r a m m i n g M a n u a l 4. ELCM-PH/PA Special register explanations: D1030, : Pulse present value register for the Y0 output for the X-axis motion. The present D1031 value increases or decreases based on the rotation direction.
Page 622 3 . I n s t r u c t i o n S e t Mnemonic Operands Function PPMA 2-Axis Absolute Point to Point Motion , S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DPPMA: 17 steps ELCB ELCM...
Page 623 E L C P r o g r a m m i n g M a n u a l 6. If the maximum output frequency setting is less than 10Hz, the output will be operated at 10Hz. If the setting is more than 200KHz, the output will be operated at 200KHz. 7.
Page 624 3 . I n s t r u c t i o n S e t DPPMA D200 D202 K100000 = D0 K1 DPPMA D204 D206 K100000 = D0 K2 D210 K100000 DPPMA D208 = D0 K3 D214 K100000 DPPMA D212 = D0 K4 M1029...
Page 625 E L C P r o g r a m m i n g M a n u a l F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m M N 0 5 0 0 3 0 0 3 E 3 - 4 5 6...
Page 626 3 . I n s t r u c t i o n S e t Mnemonic Operands Function CIMR 2-Axis Relative Position Arc Interpolation , S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DCIMR: 17 steps ELCB ELCM...
Page 627 E L C P r o g r a m m i n g M a n u a l (S ,S ) (S ,S ) (0,0) (0,0) 20 segments 10 segments Figure 3 Figure 4 D can use Y0 and Y4. When Y0 is used: Y0 refers to the 1 group of X-axis pulse outputs.
Page 628 3 . I n s t r u c t i o n S e t 10. When the 2-axis motion is being executed in 20 segments (high resolution), the operation time of the instruction when the instruction is first enabled is approximately 10ms. The number of output pulses cannot be less than 1,000 and more than 10,000,000;...
Page 629 E L C P r o g r a m m i n g M a n u a l (S ,S ) (S ,S ) (0,0) (0,0) 20 segments 20 segments Figure 8 Figure 7 5. D can use Y0. When Y0 is used: Y0 refers to the X-axis pulse outputs.
Page 630 3 . I n s t r u c t i o n S e t 1600,2200 3200,0 (1600,-2200) 2. Steps: a) Set the four coordinates (0,0), (1600, 2200), (3200, 0), (1600, -2200) per the figure above. Calculate the relative coordinates of the four points and obtain (1600, 2200), (1600, -2200), (-1600, -2200), and (-1600, 2200).
Page 631 E L C P r o g r a m m i n g M a n u a l (26000,26000) (34000,18000) (0,0) (8000,-8000) 2. Steps: a) Find the max. and min. coordinates for the X and Y axes (0,0), (26000,26000), (34000,18000), (8000,-8000) per the figure above.
Page 632 3 . I n s t r u c t i o n S e t Mnemonic Operands Function CIMA 2-Axis Absolute Position Arc Interpolation , S, D Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DCIMA: 17 steps ELCB ELCM...
Page 633 E L C P r o g r a m m i n g M a n u a l (S ,S ) (S ,S ) (0,0) (0,0) 20 segments 10 segments Figure 2 Figure 1 (S ,S ) (S ,S ) (0,0) (0,0) 20 segments...
Page 634 3 . I n s t r u c t i o n S e t Quadrant I Quadrant I I Quadrant I Quadrant I I Quadrant I II Quadrant I V Quadrant I V Quadrant I II Figure 6 Figure 5 9.
Page 635 E L C P r o g r a m m i n g M a n u a l The range of the values is -2,147,483,648 ~ +2,147,483,647 (+/- represents the forward/backward direction). When in forward direction, the pulse present value registers CH0 (D1031 high word, D1030 low word), CH1 (D1337 high word, D1336 low word) will increase.
Page 636 3 . I n s t r u c t i o n S e t each time a segment of the arc is complete, which also initiates the second segment of the arc. This execution will continue until the fourth segment of the arc is complete. Program Example 2: 1.
Page 637 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function PTPO Single-Axis Pulse Output by Table Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DPTPO: 13 steps ELCB ELCM...
Page 638 3 . I n s t r u c t i o n S e t 6. There is no limit to the number of times this instruction can be used in the program, but only one can be executed at a time for each channel. 7.
Page 639 E L C P r o g r a m m i n g M a n u a l M1335: When On, CH1 (Y2) pulse output is in error. M1520: When On, CH2 (Y4) pulse output is in error. M1521: When On, CH3 (Y6) pulse output is in error.
Page 640 3 . I n s t r u c t i o n S e t Mnemonic Operands Function High Speed Timer Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T HST, HSTP: 3 steps ELCB ELCM PC/PA/PH...
Page 641 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function CLLM Close Loop Position Control Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DCLLM: 17 steps ELCB ELCM...
Page 642 3 . I n s t r u c t i o n S e t 5. D1340, D1352, D1379 and D1380 are the settings for the start/end frequencies of CH0 ~ CH3. The minimun frequency is 10Hz and the default is 200Hz. 6.
Page 643 E L C P r o g r a m m i n g M a n u a l number of output pulses is smaller or larger than the calculated number of output pulses (taget number of feedbacks x percentage value/100), this can be improved by adjusting the percentage value, acceleration/decelartion time or the target frequency.
Page 644 3 . I n s t r u c t i o n S e t 3. Note the result of the first execution: a) The actual output number 49,200 – estimated output number 50,000 = -800 (a negative value). A negative value indicates that the entire execution finished early and has not completed.
Page 645 E L C P r o g r a m m i n g M a n u a l M1002 K100 D1198 K300 D1343 K600 D1348 M1534 D1336 DMOV C251 DCNT C251 K100000 DCLLM K50000 K100000 C251 FEND M1000 I010 IRET 2.
Page 646 3 . I n s t r u c t i o n S e t 4. The result of the second execution: a) The actual output number 50,560 – estimated output number 50,500 = 60 b) 60 x (1/200Hz) = 300ms (idling time) c) 300ms is an appropriate value.
Page 647 E L C P r o g r a m m i n g M a n u a l 8. D1131 and D1132 are the output/input ratio(%) of the close loop control in CH0 and CH1. K1 refers to 1 output pulse out of 100 feedback pulses; K200 refers to 200 output pulses out of the 100 feedback pulses.
Page 648 3 . I n s t r u c t i o n S e t M1002 K100 D1131 K100 K100 D1343 D1340 K100 K100 D1343 D1343 K100 D1348 M1534 D1030 DMOV K50000 K100000 DCLLM FEND M1000 I401 IRET 2. Execution result: Frequency X4 = OFF -->...
Page 649 E L C P r o g r a m m i n g M a n u a l M1002 K100 D1131 D1340 K200 K300 D1343 D1343 K600 D1348 M1534 D1030 DMOV C243 DMOV K9999 DCNT C243 DHSCS K50000 C243 I010 DCLLM...
Page 650 3 . I n s t r u c t i o n S e t b) 600 x (1/100Hz) = 6s (idle time) c) 6 seconds are too long. Therefore, increase the percentage value (D1131) to K101. 4. Obtain the results of the second execution: Frequency C243 =K50000 100KHz...
Page 651 E L C P r o g r a m m i n g M a n u a l M1535: Deceleration time of CH1 setup flag (must be used with D1349) M1536: Deceleration time of CH2 setup flag (must be used with D1350) M1537: Deceleration time of CH3 setup flag (must be used with D1351) 2.
Page 652 3 . I n s t r u c t i o n S e t D1377: Low word of the current number of output pulses of CH3 D1378: High word of the current number of output pulses of CH3 D1340: Start/end frequency settings for CH0 (default: K200) D1352:...
Page 653 E L C P r o g r a m m i n g M a n u a l 4. ELCM-PH/PA Special register explanations: D1026: Pulse number for masking Y0 when M1156 = ON (Low word). The function is disabled when set value≦0.
Page 654 3 . I n s t r u c t i o n S e t Mnemonic Operands Function VSPO Variable Speed Pulse Output Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DVSPO: 17 steps ELCB ELCM...
Page 655 E L C P r o g r a m m i n g M a n u a l Freq. Time Pulse number 1. Definitions: target frequency of 1 shift target frequency of 2 shift target frequency of 3 shift ramp-up time of 1 shift...
Page 656 3 . I n s t r u c t i o n S e t Freq. t2=11kHz 1kHz 2kHz 2kHz t1=6kHz Time 20ms 20ms 20ms g2=40ms shift: Assume t3 = 3kHz, gap frequency = 2kHz, gap time = 20ms Ramp-down steps of 3 shift: Freq.
Page 657 E L C P r o g r a m m i n g M a n u a l D1031: High word of the present value of Y0 pulse output D1336: Low word of the present value of Y2 pulse output D1337: High word of the present value of Y2 pulse output D1220:...
Page 658 3 . I n s t r u c t i o n S e t Mnemonic Operands Function Immediately Change Frequency Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T DVSPO: 13 steps ELCB ELCM PC/PA/PH...
Page 659 E L C P r o g r a m m i n g M a n u a l Change target freq. Actual timing of changing Freq. Gap freq. Time time time Delayed by program scan cycle If the target frequency is changed with the DICF instruction in an interrupt subroutine, the change will be executed immediately with an approximate delay of 10us (the execution time of the DICF instruction).
Page 660 3 . I n s t r u c t i o n S e t 1000Hz 800Hz 10ms Freq.(Hz) 100KHz 20ms 2000Hz 50KHz 100ms 100Hz Time(ms) M0=ON X6=ON X7=ON 1,000,000pulse DMOVP K100000 D500 K1000 D502 D503 DVSPO D500 K1000000 D502 FEND M1000...
Page 661 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function SCA L Calculation of Proportional Value Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T SCAL,SCLAP: 9 steps ELCB ELCM...
Page 662 Min. destination value. If D > 32,767, D =32,767. If D < -32,768, D =-32,768. SCAL is for V1.4 of ELC-PB series model and for V1.4 of ELC-PC/PA/PH series controllers. M N 0 5 0 0 3 0 0 3 E F o r m o r e i n f o r m a t i o n v i s i t : w w w.
Page 663 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function SCLP Calculation of Parameter Proportional Value Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T SCLP, SCLPP: 9 steps DSCLP, DSCLPP: 13 steps...
Page 664 3 . I n s t r u c t i o n S e t Destination value Max. Destination value Source value Min. Max. source value source value Min. destination value Program Example 1: is 500, the Max. source value is D0=3000, the Min. source value is D1=200, the Max. destination value is D2=500, and the Min.
Page 665 E L C P r o g r a m m i n g M a n u a l Program Example 2: is 500, the Max. source value is D0=3000, the Min. source value is D1=200, the Max. destination value is D2=30 and Min. destination value is D3=500. When X0=On, the SCLP instruction executes and the scaled value is stored in D10.
Page 666 3 . I n s t r u c t i o n S e t Program Example 3: The source value S is D100=F500, the Max. source value is D0=F3000, the Min. source value is D2=F200, the Max. destination value is D4=F500 and the Min. destination value is D6=F30. When X0=On, SET M1162 which means the DSCLP instruction will assume floating point values.
Page 667 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function CMPT , n, D Compare Table Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T CMPT: 9 steps CMPTP: 9 steps ELCB...
Page 668 3 . I n s t r u c t i o n S e t Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Bit8~15 D100 0…0 H0052 (K82) M N 0 5 0 0 3 0 0 3 E F o r m o r e i n f o r m a t i o n v i s i t : w w w.
Page 669 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function CSFO S, S Catch Speed and Proportional Output Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T CSFO: 7 steps ELCB...
Page 670 3 . I n s t r u c t i o n S e t For example, set S +0 to K1 for the speed range 1Hz~1KHz, K10 for the speed range 10Hz~10KHz, K100 for the speed range 100Hz~10KHz. D occupies 3 consecutive 16-bit registers.
Page 671 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function 215~ Logic Contact Operation Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T LD#: 5 steps DLD#: 9 steps ELCB...
Page 672 3 . I n s t r u c t i o n S e t Mnemonic Operands Function 218~ AND# Series Logic Contact Operation Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T AND#: 5 steps DAND#: 9 steps ELCB...
Page 673 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function 221~ O R # Parallel Logic Contact Operation Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T OR#: 5 steps DOR#: 9 steps...
Page 674 3 . I n s t r u c t i o n S e t Mnemonic Operands Function 224~ L D * Contact Comparison Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T LD*: 5 steps DLD*: 9 steps ELCB...
Page 675 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function 232~ AND* Series Contact Comparison Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T AND*: 5 steps DAND*: 9 steps ELCB...
Page 676 3 . I n s t r u c t i o n S e t Mnemonic Operands Function 240~ Parallel Contact Comparison Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T OR*: 5 steps DOR*: 9 steps ELCB ELCM...
Page 677 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function BOUT D, n Output Specified Bit of a Word Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T BOUT: 5 steps DBOUT: 9 steps...
Page 678 3 . I n s t r u c t i o n S e t Mnemonic Operands Function BSET D, n Set ON Specified Bit of a Word Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T BSET: 5 steps DBSET: 9 steps ELCB...
Page 679 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function BRST D, n Reset Specified Bit of a Word Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T BRST: 5 steps DBRST: 9 steps...
Page 680 3 . I n s t r u c t i o n S e t Mnemonic Operands Function S, n Load NO Contact by Specified Bit Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T BLD: 5 steps DBLD: 9 steps ELCB...
Page 681 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function BLDI S, n Load NC Contact by Specified Bit Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T BLDI: 5 steps DBLDI: 9 steps...
Page 682 3 . I n s t r u c t i o n S e t Mnemonic Operands Function BAND S, n Connect NO Contact in Series by Specified Bit Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T BLDI: 5 steps DBLDI: 9 steps...
Page 683 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function BANI S, n Connect NC Contact in Series by Specified Bit Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T BANI: 5 steps...
Page 684 3 . I n s t r u c t i o n S e t Mnemonic Operands Function S, n Connect NO Contact in Parallel by Specified Bit Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T BOR: 5 steps DBOR: 9 steps ELCB...
Page 685 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function BORI S, n Connect NC Contact in Parallel by Specified Bit Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T BORI: 5 steps...
Page 686 3 . I n s t r u c t i o n S e t Mnemonic Operands Function 275~ F L D * Floating Point Number Contact Comparison Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T FLD*: 9 steps ELCB ELCM...
Page 687 E L C P r o g r a m m i n g M a n u a l Mnemonic Operands Function 281~ Floating Point Number Series Contact FAND* Comparison Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T FAND*: 9 steps ELCB...
Page 688 3 . I n s t r u c t i o n S e t Mnemonic Operands Function 287~ Floating Point Number Parallel Contact FOR* Comparison Type Bit Devices Word devices Program Steps Y M S H KnX KnY KnM KnS T FOR*: 9 steps ELCB ELCM...
Page 689 Sequential Function Chart This chapter contains information in programming in SFC mode. This Chapter Contains 4.1 Sequential Function Chart (SFC) ..................4-2 4.2 Basic Operation ........................4-2 4.3 SFC Viewed as Ladder and Instruction List ..............4-9 4 - 1 M N 0 5 0 0 3 0 0 3 E F o r m o r e i n f o r m a t i o n v i s i t : w w w.
Page 690 E L C P r o g r a m m i n g M a n u a l 4. Sequential Function Chart Sequential Function Chart (SFC) Sequential Function Charts are a graphical method of organizing a PLC program in which the entire structure of the program resembles a flow chart.
Page 691 4 . S e q u e n t i a l F u n c t i o n C h a r ts Icons shown on SFC Description of Icons Explanation: toolbar Alternative convergence: Used to move from multiple Convergence of step points to the same single step point, each move condition diagram...
Page 692 E L C P r o g r a m m i n g M a n u a l SFC Structure Logic that is needed outside of SFC logic is put here. Logic is executed every scan. At a minimum logic to enable Initial Step Point must be located here. Initial Step The start of the procedure Only one per procedure...
Page 693 4 . S e q u e n t i a l F u n c t i o n C h a r ts Common Step Point These compose the bulk of the SFC Step Points in a procedure other than the Initial Step Point Ladder logic is contained within the Step Points.
Page 694 E L C P r o g r a m m i n g M a n u a l 1. Alternative Convergence: 2. Simultaneous Convergence: This is an OR condition. There is only one This is an AND condition. Move from S30, path.
Page 695 4 . S e q u e n t i a l F u n c t i o n C h a r ts 1. Alternative: 2. Simultaneous: Move to or from multiple step points Move to or from multiple step points according to different transition conditions.
Page 696 E L C P r o g r a m m i n g M a n u a l Return to the initial step point S0 in the same Transition between SFC diagrams in two procedure. different procedures. F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m M N 0 5 0 0 3 0 0 3 E 4 - 8...
Page 697 4 . S e q u e n t i a l F u n c t i o n C h a r ts SFC Viewed as Ladder and Instruction List ■ Rules of SFC Segment and Row comments cannot be used in SFC mode – only Device comments can be used.
Page 698 E L C P r o g r a m m i n g M a n u a l LADDER Alternative Divergence Alternative Divergence Simultaneous Convergence Simultaneous Convergence * This does not show the inner ladder logic of each step. ■...
Page 699 Communications This chapter contains information regarding the built-in communications ports of the ELC processors. This Chapter Contains A.1 Communication Ports ......................A-2 A.2 Configuration of the communication ports ..............A-3 Selecting master or slave operation..................A-3 Selecting transmission mode....................A-3 Selecting data packet format....................A-3 A.3 Communication Protocol ASCII transmission mode ............
Page 700 This chapter describes the communications capabilities that are built in to the ELC processor modules. Communication Ports The ELC-PB/PC/PA/PH/PV and the ELCB-PB models have 2 communication ports: COM1: is an RS-232, slave only communication port. It is the primary port for ELC programming or for connectivity to an HMI panel.
Page 701 Selecting master or slave operation. For the ELC-PB/PC/PA/PH/PV and the ELCB-PB models COM1 is always a slave port. COM2 is automatically set to master functionality if a message instruction is entered in the program,...
Page 702 E L C P r o g r a m m i n g M a n u a l 00:None Parity 01:Odd 11: Even Stop bits 0: 1 bit, 1: 2 bits 0001 (H1): 0010 (H2): 0011 (H3): 0100 (H4): 0101 (H5): 1200 0110 (H6):...
Page 703 A. C o m m u n i c a t i o n s A.3 Communication Protocol ASCII transmission mode This section describes the messaging for a port that has been configured to support Modbus ASCII Transmission mode. An ASCII transmission message Frame is shown below Field name Content Explanation...
Page 704 E L C P r o g r a m m i n g M a n u a l The values of T20~T27 are mapped to Modbus Registers: H0614~H061B Command message: “: 01 03 06 14 00 08 DA CR LF” Field name ASCII Slave Address...
Page 705 A. C o m m u n i c a t i o n s Field name ASCII Data Lo (T27) 30 38 Check sum(LRC) 43 38 CR LF 0D 0A LRC CHK（check sum） The LRC (Longitudinal Redundancy Check) is calculated by summing up, module 256, the values of the bytes from ADR1 to the last data character, then calculating the hexadecimal representation of the 2’s-complement negation of the sum.
Page 706 E L C P r o g r a m m i n g M a n u a l Communication Protocol RTU transmission mode This section describes the messaging for a port that has been configured to support Modbus RTU Transmission mode An RTU transmission message Frame is shown below START...
Page 707 A. C o m m u n i c a t i o n s ELC→PC “ 01 03 10 00 01 00 02 00 03 00 04 00 05 00 06 00 07 00 08 72 98” Feedback message: Field Name Example (Hex) START...
Page 708 E L C P r o g r a m m i n g M a n u a l ELC Modbus Address mapping This section describes how the native ELC data elements map to Modbus addresses ELC-PB, ELCB-PB, ELC-PC/PA/PH Effective Range MODBUS...
Page 709 A. C o m m u n i c a t i o n s Effective Range MODBUS Device Range Address ELC-PB, Address ELC-PC/PA/PH ELCB-PB 000~255 1000~10FF 000~599 256~511 1100~11FF 1000~1143 404097~405376 512~767 1200~12FF 768~1023 1300~13FF 1256~1311 1024~1279 1400~14FF 1280~1535...
Page 710 E L C P r o g r a m m i n g M a n u a l ELC-PV, ELCM-PH/PA Effective Range MODBUS Device Range Address Address ELC-PV ELCM-PH/PA 000~255 000001~000256 0000~00FF 246~511 000257~000512 0100~01FF 000~1023 000~1023 512~767 000513~000768 0200~02FF 768~1023...
Page 711 A. C o m m u n i c a t i o n s Effective Range MODBUS Device Range Address Address ELC-PV ELCM-PH/PA 1000~10FF 000~255 256~511 1100~11FF 404097~405376 512~767 1200~12FF 768~1023 1300~13FF 1024~1279 1400~14FF 1280~1535 1500~15FF 1600~16FF 1536~1791 1792~2047 1700~17FF 2048~2303 1800~18FF...
Page 712 E L C P r o g r a m m i n g M a n u a l Function Code support (Slave Mode) The following function codes are supported by the ELC in slave mode: CMD(Hex) Explanation Device 01 (01 H) Read Coil Status of Contact S, Y, M, T, C...
Page 713 A. C o m m u n i c a t i o n s Field Name ASCII Slave Address Command code Bytes Count Data (Coils T27…T20) Data (Coils T35…T38) Data (Coils T43…T36) Data (Coils T51…T44) Data (Coils T56…T52) Error Check (LRC) END 1 0D (Hex) END 0...
Page 714 E L C P r o g r a m m i n g M a n u a l Field Name ASCII Data (Coils Y043…Y034) Data (Coils Y053…Y044) Data (Coils Y063…Y054) Data (Coils Y070…Y064) Error Check (LRC) END 1 0D (Hex) END 0 0A (Hex)
Page 715 A. C o m m u n i c a t i o n s Field Name ASCII Data Hi (T22) Data Lo (T22) Data Hi (T23) Data Lo (T23) Data Hi (T24) Data Lo (T24) Data Hi (T25) Data Lo (T25) Data Hi (T26) Data Lo (T26) Data Hi (T27)
Page 716 E L C P r o g r a m m i n g M a n u a l Field Name ASCII Heading 3A (Hex) Slave Address Command code Coil Address Hi Coil Address Lo Force Data Hi Force Data Lo Error Check ( LRC ) END 1 0D (Hex)
Page 717 A. C o m m u n i c a t i o n s Field Name ASCII Error Check ( LRC ) END 1 0D (Hex) END 0 0A (Hex) Example2： Case 1: C0 Master→ELC : 01 06 0E 00 12 34 AF CR LF Case 2: C232 (32bit) (This is an exception of the function code.) Master→ELC: 01 06 0E E8 12 34 56 78 EF CR LF Case 3: D10...
Page 718 E L C P r o g r a m m i n g M a n u a l Field Name ASCII Command code Register T0 Address Hi Register T0 Address Lo Preset Data Hi Preset Data Lo Error Check ( LRC ) END 1 0D (Hex) END 0...
Page 719 A. C o m m u n i c a t i o n s Field Name ASCII Starting Address Hi Starting Address Lo Number of Registers Hi Number of Registers Lo Error Check ( LRC ) END 1 0D (Hex) END 0 0A (Hex) Command Code：17, Report Slave ID...
Page 720 The ELC can read up to 6 Registers API=100 MODWR 06H Write Single Register The ELC can write a single register value API=101 ELC-PB , ELCB-PB support (H03), (H06), (H10), MODRW ELC-PC/PA/PH support (H02), (H03), (H06), (H10) Selectable in the instruction. API=150 and (H0F), ELC-PV, ELCM-PH/PA support (H02), (H03), (H05) ,(H06), (H10) and (H0F).
Page 721 Troubleshooting This chapter provides information for troubleshooting during ELC operation. This Chapter Contains Common Problems and Solutions..................B-2 Fault code Table (Hex) ....................... B-5 Error Detection Addresses ....................B-8 M N 0 5 0 0 3 0 0 3 E F o r m o r e i n f o r m a t i o n v i s i t : w w w.
Page 722 Add another power supply for the other devices or increase the capacity of the power supply. If the problem can not be resolved with the instructions above, contact the Eaton support center. ERROR LED is A flashing ERROR LED potentially indicates one of the following...
Page 723 3. Check the voltage level at the input terminal. If it is below the input threshold but the Input LED is ON, a failure in the ELC input circuit is indicated. Contact the Eaton support center If the LED indicator is OFF 1.
Page 724 Check if power is properly supplied to the loads. If the wiring is correct but power is not supplied to the load, there is potentially a fault with the ELC’s output circuit. Contact the Eaton support center If the corresponding output LED is off, Monitor the output condition using a programming tool.
Page 725 B . Tr o u b l e s h o o t i n g B.2 Fault code Table (Hex) Errors detected in the ELC program will result in a flashing of the ERROR LED and M1004 = ON. The corresponding fault code (hex) can be read from special register D1004.
Page 726 E L C P r o g r a m m i n g M a n u a l Fault Code Description Action 0E1A Device use is out of range (including index registers E, F) 0E1B negative number after radical expression 0E1C FROM/TO communication error 0F04...
Page 727 B . Tr o u b l e s h o o t i n g Fault Code Description Action ELC program and data in parameters have not been C40F initialized C41B Invalid RUN/STOP instruction to extension module The number of input/output points of I/O extension unit is C41C larger than the specified limit C41D...
Page 728 E L C P r o g r a m m i n g M a n u a l B.3 Error Detection Addresses Error Check Description Drop Latch STOP STOP Address M1067 Program execution error flag None Reset Latch M1068 Execution error latch flag None...

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