National Instruments MXI-2 Series Getting Started page 49

Appendix B Common Questions
PCI-Based MXI-2 Interface for Windows
What is the accuracy of the CLK10 signal?
The CLK10 generated by the VXI-MXI-2 is 100 ppm (0.01%) as per the
VXIbus specification. If you need a more accurate CLK10 signal, you can
use the EXTCLK input at the front of the VXI-MXI-2.
CLK10 is not applicable to VME.
What are the user and driver windows?
The PCI-MXI-2, PCI-MXI-2 Universal, and PXI-8320 driver requires the
use of two PCI windows: a user window and a driver window. NI-VXI uses
the driver window to perform high-level functions such as
, and to access registers on the MXI-2 boards in the system. The user
ViOut
window is reserved for low-level function calls, such as
and . The driver window is system defined and not
ViMapAddress
configurable, but you can increase the size of your user window through
MAX if you expect to initiate transfers to a wide variety of addresses in
both A24 and A32 address spaces.
What is shared memory and dual-ported memory?
These terms refer to a block of memory that is accessible to both a client
and a server. The memory block operates as a message buffer for
communications. Shared memory is applicable only if you are using either
A24 or A32 address space.
How should I assign logical addresses in a multiple-mainframe
system?
A simple algorithm for a system containing only one level of
hierarchy—a single chain of MXI cables—is to use the upper nibble
(most significant four bits) as a frame number and the lower nibble (least
significant four bits) as a device number. For example, the fifth device in
the third mainframe would be logical address 35 (hex).
For more detailed information on this topic, refer to the VXI-MXI-2 User
Manual, the VME-MXI-2 User Manual, or the VXI-6, VXIbus Mainframe
Extender Specification.
B-8
and
ViIn
, ,
ViPeek ViPoke
ni.com