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Page 2 VME-MXI-2 User Manual January 1996 Edition Part Number 321071A-01 © Copyright 1996 National Instruments Corporation. All Rights Reserved. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 3 Netherlands 0348 433466, Norway 32 84 84 00, Singapore 2265886, Spain 91 640 0085, Sweden 08 730 49 70, Switzerland 056 200 51 51, Taiwan 02 377 1200, U.K. 01635 523545 National Instruments Corporate Headquarters 6504 Bridge Point Parkway Austin, TX 78730-5039 Tel: (512) 794-0100 Artisan Technology Group - Quality Instrumentation ...
Page 4 Important Information Warranty The VME-MXI-2 is warranted against defects in materials and workmanship for a period of one year from the date of shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty period. This warranty includes parts and labor.
Page 5 FCC Rules. If necessary, consult National Instruments or an experienced radio/television technician for additional suggestions. The following booklet prepared by the FCC may also be helpful: How to Identify and Resolve Radio-TV Interference Problems.
Page 6 What You Need to Get Started ..................1-1 MXI-2 Description......................1-2 VME-MXI-2 Description....................1-2 Front Panel Features ..................1-5 Optional Equipment......................1-5 Chapter 2 Functional Overview VME-MXI-2 Functional Description ................2-1 Chapter 3 VME-MXI-2 Configuration and Installation Configure the VME-MXI-2..................3-1 VMEbus A16 Base Address................3-3 VME-MXI-2 Intermodule Signaling..............3-4 MXIbus Termination..................3-6 Configuration EEPROM ................3-8...
Page 7: Table Of Contents
VXIbus Subclass Register (VSCR)..............4-24 VME-MXI-2 Status Register (VMSR) ............4-25 VME-MXI-2 Control Register (VMCR)............4-28 VMEbus Lock Register (VLR) ..............4-31 VME-MXI-2 Logical Address Register (VLAR) ..........4-32 VMEbus Interrupt Status Register (VISTR) ..........4-33 VMEbus Interrupt Control Register (VICTR) ..........4-35 VMEbus Status ID Register (VSIDR)............4-37 VMEbus Interrupt Acknowledge Register 1 (VIAR1) ........4-38...
Page 8 Configuring the Logical Address Window Example .......5-41 Configuring the A24 and A32 Addressing Windows ........5-44 Chapter 6 VXI plug&play for the VME-MXI-2 VME-MXI-2 VXIplug&play Soft Front Panel ............6-1 Installing the Soft Front Panel................6-1 Using the Soft Front Panel ................6-2 Board Settings ....................6-3 Logical Address Select and Logical Address ........6-3...
Page 9 Table of Contents Parity Checking................6-12 Fair Requester ..................6-12 VME-MXI-2 VXIplug&play Knowledge Base File ............6-13 Appendix A Specifications Appendix B Programmable Configurations Appendix C VME-MXI-2 Front Panel Configuration Appendix D Differences and Incompatibilities between the VME-MXI and the VME-MXI-2 Appendix E...
Page 10 Table of Contents Figures Figure 2-1. VME-MXI-2 Block Diagram ..............2-2 Figure 3-1. VME-MXI-2 Parts Locator Diagram ............3-2 Figure 3-2. A16 Base Address Selection..............3-4 Figure 3-3. VME-MXI-2 Intermodule Signaling Settings ........3-5 Figure 3-4. MXIbus Termination ................3-7 Figure 3-5. EEPROM Operation................3-9 Figure 3-6.
Page 11 Figure 5-28. Worksheet 4 for MXIbus #3 A16 Address Map........5-38 Figure 5-29. Worksheet 5 for MXIbus #4 A16 Address Map........5-39 Figure 6-1. VME-MXI-2 VXIplug&play Soft Front Panel ........6-2 Figure 6-2. VME-MXI-2 VMEbus Settings ............6-7 Figure 6-3. VME-MXI-2 MXIbus Settings..............6-10 Figure C-1.
Page 12 VME-MXI-2 module. • Chapter 4, Register Descriptions, contains detailed information on some of the VME-MXI-2 registers, which you can use to configure and control the module’s operation. • Chapter 5, System Configuration, explains important...
Page 13 VME-MXI-2 mainframe extenders. • Appendix F, DMA Programming Examples, contains two example programs for using the DMA controllers on the VME-MXI-2. If you are using a version of the National Instruments NI-VXI software that has remote DMA controller functionality, this information is not necessary because you can make use of the VME-MXI-2 module’s DMA controllers from the NI-VXI...
Page 14 Glossary. How to Use This Manual If you will be installing your VME-MXI-2 into a system with a VXIbus Multiframe Resource Manager, you only need to read Chapters 1 through 3 of this manual. If you have more than two VME-MXI-2 modules extending your system, you will find useful system configuration information in Chapter 5.
Page 15 About This Manual reference for users who have a system containing two mainframes linked by VME-MXI-2 modules. If your system does not have a VXIbus Resource Manager, you can find programming information and descriptions of the VME-MXI-2 hardware in Chapters 4 and 5.
Page 16 Chapter Introduction This chapter describes the VME-MXI-2, lists what you need to get started, lists optional equipment, and introduces the concepts of MXI-2. VME-MXI-2 Overview The VME-MXI-2 interface is a mainframe extender for the VMEbus. It extends the VMEbus architecture outside a VMEbus mainframe via MXI-2, the second-generation MXIbus (Multisystem eXtension Interface bus).
Page 17 The VME-MXI-2 module is a double-height, single-width VMEbus device with optional VMEbus System Controller functions. The VME-MXI-2 can automatically determine if it is located in the first slot of a VMEbus chassis and if it is the MXIbus System Controller.
Page 18 VMEbus system. An external PC with a MXIbus interface can also be connected to a VMEbus mainframe with a VME-MXI-2. This configuration makes the PC function as though it were an embedded VMEbus controller that is plugged into the VMEbus mainframe.
Page 19 – ROAK or RORA (programmable) – Responds to D16 or D32 IACK cycles The VME-MXI-2 does not have support for the serial clock driver or power monitor VMEbus modules. VME-MXI-2 User Manual © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 20 Chapter 1 Introduction All integrated circuit drivers and receivers used on the VME-MXI-2 meet the requirements of both the VMEbus specification and the MXIbus specification. Front Panel Features The VME-MXI-2 has the following front panel features: • Three front panel LEDs –...
Page 21 This chapter contains functional descriptions of each major logic block on the VME-MXI-2. VME-MXI-2 Functional Description In the simplest terms, you can think of the VME-MXI-2 as a bus translator that converts VMEbus signals into appropriate MXIbus signals. From the perspective of the MXIbus, the VME-MXI-2 implements a MXIbus interface to communicate with other MXIbus devices.
Page 22: Figure 2-1. Vme-Mxi-2 Block Diagram
Utility SYSRESET Utility Signal Utility SYSFAIL SYSFAIL Signal Circuitry Signal Xcvrs Xcvrs ACFAIL ACFAIL Figure 2-1. VME-MXI-2 Block Diagram VME-MXI-2 User Manual © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 23 Chapter 2 Functional Overview • VMEbus System When the VME-MXI-2 is installed in the first slot of a VMEbus Controller Functions mainframe it assumes the System Controller responsibilities defined in the VMEbus specification. These are the VMEbus 16 MHz system clock driver, VMEbus arbiter, and VMEbus IACK daisy-chain driver.
Page 24 VMEbus cycles to map to the MXIbus. This state machine will also generate MXIbus master data transfer cycles when instructed to do so by one of the DMA controllers. The VME-MXI-2 can generate D64, D32, D16, and D08(EO) single, block, RMW, and synchronous burst cycles on the MXIbus in A32 and A24 space.
Page 25 BERR* are not asserted in a prescribed amount of time after DS* is asserted. The duration of the timeout is programmably selectable in the range of 15 µs to 256 ms. The VME-MXI-2 must be the sole bus timer of its VMEbus chassis even when not acting as the System Controller.
Page 26 The MXI-2 parity check/generation circuitry checks for even parity at and Generation any time that the VME-MXI-2 is receiving the AD[31–0] signals. If parity is not even, the appropriate MXI-2 state machine is signaled. The MXI-2 master state machine is signaled for a parity error during...
Page 27 This logic block represents all registers on the VME-MXI-2. The Registers registers are accessible from either the VMEbus or MXIbus. All registers are available in the first 4 KB of the VME-MXI-2 A24/A32 memory space, while a subset is accessible in the VME-MXI-2 VXIbus A16 configuration area.
Page 28 Configuration EEPROM • Onboard DRAM The VME-MXI-2 automatically detects if it is located in the first slot of the chassis to perform the VMEbus System Controller functions. It is not necessary to configure the VME-MXI-2 System Controller option. The module can be installed in any double-height slot of a VMEbus chassis.
Page 29: Figure 3-1. Vme-Mxi-2 Parts Locator Diagram
Chapter 3 VME-MXI-2 Configuration and Installation Figure 3-1 shows the VME-MXI-2. The drawing shows the location and factory-default settings of the configuration switches and jumpers on the module. DRAM DRAM Figure 3-1. VME-MXI-2 Parts Locator Diagram VME-MXI-2 User Manual © National Instruments Corporation...
Page 30 The A16 base address of the VME-MXI-2 will be address lines 15 and 14 high with address lines 13 through 6 matching the logical address of the VME-MXI-2, and address lines 5 through 0 low. In other words, the A16 base address of the VME-MXI-2 module’s...
Page 31: Figure 3-2. A16 Base Address Selection
Figure 3-2. A16 Base Address Selection VME-MXI-2 Intermodule Signaling If you will be installing more than one VME-MXI-2 in a single VMEbus chassis, you must select a user-defined pin for use by the VME-MXI-2. The VME-MXI-2 modules use this signal to disable the bus timeout unit(s) on the other VME-MXI-2 modules during VMEbus accesses that map to the MXIbus.
Page 32: Figure 3-3. Vme-Mxi-2 Intermodule Signaling Settings
You can choose from three user-defined pins on J2/P2. The pin you select must be bused on the VMEbus backplane between all slots that will have a VME-MXI-2 installed. Use jumper W2 to select pin A5, C5, or C30 of J2/P2, as shown in Figure 3-3.
Page 33 MXIbus. Any MXIbus devices in the middle of a MXIbus daisy chain must not terminate the MXIbus. The VME-MXI-2 automatically senses if it is at either end of the MXIbus cable to terminate the MXIbus. You can manually control MXIbus termination by defeating the automatic circuitry.
Page 34: Figure 3-4. Mxibus Termination
Chapter 3 VME-MXI-2 Configuration and Installation a. Automatic MXIbus Termination (Default) b. Terminate MXIbus (On) c. Do Not Terminate MXIbus (Off) Figure 3-4. MXIbus Termination © National Instruments Corporation VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 35 This is useful in the event that the user-configured half of the EEPROM becomes corrupted in such a way that the VME-MXI-2 boots to an unusable state. The Change Factory Configuration switch (switch 2 of U21) lets you change the factory-default configuration settings by permitting writes to the factory settings section of the EEPROM.
Page 36: Figure 3-5. Eeprom Operation
Chapter 3 VME-MXI-2 Configuration and Installation a. Boot from User Configuration (Factory Configuration Protected) (Default) b. Boot from Factory Configuration (Factory Configuration Protected) c. Boot from User Configuration (Factory Configuration Unprotected) d. Boot from Factory Configuration (Factory Configuration Unprotected) Figure 3-5. EEPROM Operation ©...
Page 37: Figure 3-6. Simm Size Configuration
SIMMs installed must be of the same type. Use Bank 0 first when installing SIMMs. This allows you to install up to 64 MB. The VME-MXI-2 supports DRAM speeds of 80 ns or faster.
Page 38: Table 3-1. Vme-Mxi-2 Dram Configurations
Chapter 3 VME-MXI-2 Configuration and Installation Table 3-1. VME-MXI-2 DRAM Configurations Bank 0 Bank 1 Total DRAM National Switch Instruments Setting Option? of S2 — — — — 256 K x 32 or — 1 MB — 256 K x 36...
Page 39 Using slow, evenly distributed pressure, press the VME-MXI-2 straight in until it seats in the expansion slot. The front panel of the VME-MXI-2 should be even with the front panel of the mainframe. Tighten the retaining screws on the top and bottom edges of the front panel.
Page 40 Additional MXI-2 Cable To Other (Ordered Separately) Mainframes Figure 3-7. MXI-2 Cable Configuration Using an External Device and a VME-MXI-2 © National Instruments Corporation 3-13 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 41: Register Descriptions
SYSRESET* signal is asserted. A soft reset occurs when the RESET bit in the VXIbus Control Register (VCR) is written with a 1 while the VME-MXI-2 is not in the PASSED state. The VME-MXI-2 enters the PASSED state shortly after a hard reset and cannot be put into the soft reset state afterwards.
Page 42: Vxibus Configuration Registers
An asterisk (*) after a bit name indicates that the bit is active low. VXIbus Configuration Registers Table 4-1 is a register map of the VME-MXI-2 register subset, which is accessible in A16 space. The table gives the mnemonic, offset from the base address, access type (read only, write only, or read/write), access size, and register name.
Page 43 Chapter 4 Register Descriptions Table 4-1. VME-MXI-2 VMEbus Configuration Register Map (Continued) Offset Mnemonic (Hex) Access Type Access Size Register Name VWR1 Read/Write 32/16/8 bit Extender A16 Window VWR2 Read/Write 16/8 bit Extender A24 Window VWR3 Read/Write 16/8 bit Extender A32 Window...
Page 44: Vxibus Id Register (Vidr)
MANID[0] This register contains information about the VME-MXI-2. You can determine the device class, the address spaces in which the VME-MXI-2 has operational registers, and the manufacturer ID of the VME-MXI-2. This register conforms to the VXIbus specification. When accessed with a 32-bit cycle, the bits of this register appear on bits 31 to 16 along with the VXIbus Device Type Register (VDTR) on bits 15 to 0.
Page 45: Vxibus Device Type Register (Vdtr)
This register contains information about the VME-MXI-2 that indicates the amount of required address space and identifies the model code of the VME-MXI-2. This register conforms to the VXIbus specification. Hard and soft resets have no effect on this register.
Page 46: Vxibus Status Register (Vsr)
SFINH RESET This register contains status information about the VME-MXI-2. This register conforms to the VXIbus specification. When accessed with a 32-bit cycle, the bits of this register appear on bits 31 to 16 along with the VXIbus Offset Register (VOR) on bits 15 to 0.
Page 47 Revision A. These bits are not affected by hard or soft resets. READY Ready This bit becomes 1 shortly after a hard reset to indicate that the VME-MXI-2 is ready to execute all of its functionality. This bit is not affected by a soft reset. PASSED Passed...
Page 48: Vxibus Control Register (Vcr)
SFINH RESET This register provides various control bits for the VME-MXI-2. This register conforms to the VXIbus specification. When accessed with a 32-bit cycle, the bits of this register appear on bits 31 to 16 along with the VXIbus Offset Register (VOR) on bits 15 to 0.
Page 49 VME-MXI-2 into the Soft Reset state. The VME-MXI-2 cannot be put in the Soft Reset state once the PASSED bit becomes 1. When this bit is 0, the VME-MXI-2 is in the normal operation state. This bit is cleared on a hard reset.
Page 50: Vxibus Offset Register (Vor)
OFFSET[5] OFFSET[4] OFFSET[3] OFFSET[2] OFFSET[1] OFFSET[0] This register determines the base address on the VMEbus and the MXIbus at which to locate the VME-MXI-2 module’s A24/A32 resources. This register conforms to the VXIbus specification. Mnemonic Description 15-0 OFFSET[15:0] VMEbus Offset...
Page 51: Extender Logical Address Window Register (Vwr0)
VME-MXI-2 will respond to its configuration accesses from both the VMEbus and the MXIbus. This register conforms to the VXIbus Mainframe Extender specification. This register takes on a different form when the CMODE bit in the VME-MXI-2 Control Register (VMCR) is set. This different form does not comply with the VXIbus Mainframe Extender specification and the CMODE bit should not be set when using a VXIbus multiframe Resource Manager.
Page 52 These bits can be thought of as the base logical address of the range that maps through the VME-MXI-2. These bits are cleared by a hard reset and are not affected by a soft reset.
Page 53: Extender A16 Window Register (Vwr1)
VWR0. This register conforms to the VXIbus Mainframe Extender specification. This register takes on a different form when the CMODE bit in the VME-MXI-2 Control Register (VMCR) is set. This different form does not comply with the VXIbus Mainframe Extender specification, and the CMODE bit should not be set when using a VXIbus multiframe Resource Manager.
Page 54 These bits are cleared by a hard reset and are not affected by a soft reset. VME-MXI-2 User Manual 4-14 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 55: Extender A24 Window Register (Vwr2)
A24 accesses from both the VMEbus and the MXIbus. This register conforms to the VXIbus Mainframe Extender specification. This register takes on a different form when the CMODE bit in the VME-MXI-2 Control Register (VMCR) is set. This different form does not comply with the VXIbus Mainframe Extender specification, and the CMODE bit should not be set when using a VXIbus multiframe Resource Manager.
Page 56 VMEbus A24 space). These bits are cleared by a hard reset and are not affected by a soft reset. VME-MXI-2 User Manual 4-16 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 57: Extender A32 Window Register (Vwr3)
A32 accesses from both the VMEbus and the MXIbus. This register conforms to the VXIbus Mainframe Extender specification. This register takes on a different form when the CMODE bit in the VME-MXI-2 Control Register (VMCR) is set. This different form does not comply with the VXIbus Mainframe Extender specification, and the CMODE bit should not be set when using a VXIbus multiframe Resource Manager.
Page 58 VMEbus A32 space). These bits are cleared by a hard reset and are not affected by a soft reset. VME-MXI-2 User Manual 4-18 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 59: Vxibus Interrupt Configuration Register (Vicr)
More than one VME-MXI-2 can route the same interrupt level to the same bus (the VMEbus or MXIbus). This register conforms to the VXIbus Mainframe Extender specification.
Page 60 INTDIR[7:1] bit is 1 (inward). These bits are cleared by a hard reset and are not affected by a soft reset. VME-MXI-2 User Manual 4-20 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 61: Vxibus Utility Configuration Register (Vucr)
VME-MXI-2 modules routing the utility signals or the directions in which they are routed. Also, the VME-MXI-2 can route any utility signal in both directions simultaneously. This register conforms to the VXIbus Mainframe Extender specification.
Page 62 Chapter 4 Register Descriptions ACFIN ACFAIL* In Setting this bit causes the VME-MXI-2 to route the ACFAIL* signal from the MXIbus to the VMEbus. When this bit is clear, ACFAIL* is ignored on the MXIbus. This bit is cleared by a hard reset and is not affected by a soft reset.
Page 63 Chapter 4 Register Descriptions SROUT SYSRESET* Out Setting this bit causes the VME-MXI-2 to route the SYSRESET* signal from the VMEbus to the MXIbus. When this bit is clear, SYSRESET* is ignored on the VMEbus. You can route SYSRESET* in both directions simultaneously.
Page 64: Vxibus Subclass Register (Vscr)
DEVCLASS[1:0] bits in the VXIbus ID Register (VIDR) that it is an Extended Class device. The VME-MXI-2 is a Mainframe Extender, which is one of the VXIbus-defined Extended classes. This register contains the VXIbus Mainframe Extender subclass code.
Page 65: Vme-Mxi-2 Status Register (Vmsr)
INTLCK DSYSFAIL FAIR MXISC SCFG MBERR PARERR This VME-MXI-2-specific register provides status bits for various operations. Mnemonic Description Reserved This bit is reserved and returns 0 when read. CMODE Comparison Mode Status This bit reflects the state of the CMODE bit in the VME-MXI-2 Control register (VMCR).
Page 66 Configurations, for information on configuring the VME-MXI-2 as a fair MXIbus requester. MXISC MXIbus System Controller Status This bit returns a 1 if the VME-MXI-2 is the MXIbus System Controller, or a 0 when the VME-MXI-2 is not the MXIbus System Controller.
Page 67 VME-MXI-2 before initialization is complete. MBERR MXIbus Bus Error Status If this bit is set, the VME-MXI-2 terminated the previous MXIbus transfer by driving the MXIbus BERR* line. This indicates that the cycle was terminated because of a bus error or a retry condition.
Page 68: Vme-Mxi-2 Control Register (Vmcr)
20 (hex) Attributes: Write Only 16, 8-bit accessible CMODE DSYSFAIL DSYSRST INTLCK This VME-MXI-2 specific register provides control bits for various operations. Mnemonic Description Reserved This bit is reserved. Write a 0 when writing to this bit. CMODE Comparison Mode...
Page 69 These bits are reserved. Write a 0 to each of these bits when writing the VMCR. DSYSFAIL Drive SYSFAIL* Writing a 1 to this bit causes the VME-MXI-2 to assert the VMEbus SYSFAIL* line. This bit is cleared by hard and soft resets. DSYSRST...
Page 70 Chapter 4 Register Descriptions INTLCK Interlocked Mode Writing a 1 to this bit causes the VME-MXI-2 to interlock arbitration between the VMEbus and the MXIbus. When arbitration is interlocked, the VME-MXI-2 will always own either the VMEbus or the MXIbus. When the VME-MXI-2...
Page 71: Vmebus Lock Register (Vlr)
When a MXIbus device reads this bit as a 1, it indicates that the VMEbus is locked. This bit does not read as a 1 until the VME-MXI-2 has successfully arbitrated for and won the indicated bus. Writing a 0 to this bit unlocks the appropriate bus.
Page 72: Vme-Mxi-2 Logical Address Register (Vlar)
LA[7] LA[6] LA[5] LA[4] LA[3] LA[2] LA[1] LA[0] This register provides the logical address of the VME-MXI-2. Mnemonic Description 15-8 Reserved These bits are reserved. They return 0 when read. LA[7:0] Logical Address Status These bits return the logical address of the VME-MXI-2.
Page 73: Vmebus Interrupt Status Register (Vistr)
You can use this register to monitor the VMEbus IRQ[7:1] lines and the status of local VME-MXI-2 interrupt conditions. Bits 15 through 8 of this register, along with the logical address of the VME-MXI-2 on bits 7 through 0, are returned during an interrupt acknowledge cycle for the local interrupt condition.
Page 74 ACFAIL* asserts. SFINT VMEbus SYSFAIL* Interrupt Status This bit returns 1 when the VME-MXI-2 is driving the VMEbus IRQ[7:1] selected by LINT[3:1] because the SYSFAIL* line is asserted. This bit clears after the VME-MXI-2 responds to an interrupt acknowledge cycle for the local interrupt.
Page 75: Vmebus Interrupt Control Register (Victr)
DIRQ[7] DIRQ[6] DIRQ[5] DIRQ[4] DIRQ[3] DIRQ[2] DIRQ[1] This register allows the VME-MXI-2 to assert the VMEbus IRQ[7:1] lines and provides enable bits for the various VME-MXI-2 local interrupts. Mnemonic Description 15-13 LINT[3:1] Local Interrupt Level These bits determine which VMEbus interrupt level the local interrupt conditions will assert.
Page 76 DIRQ[7:1] Drive VMEbus Interrupt Request [7:1] Writing a 1 to one of these bits causes the VME-MXI-2 to assert the corresponding VMEbus interrupt request. When the interrupt driven from these bits is acknowledged, the value in the VMEbus Status ID Register (VSIDR) is returned and the DIRQ[7:1] bit clears, releasing the interrupt.
Page 77: Vmebus Status Id Register (Vsidr)
S[15:0] Status ID These bits are cleared by a hard reset and are not affected by a soft reset. © National Instruments Corporation 4-37 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 78: Vmebus Interrupt Acknowledge Register 1 (Viar1)
Description 15-0 I1[15:0] Level 1 Interrupter Status ID These bits return the Status ID received during the IACK cycle. VME-MXI-2 User Manual 4-38 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 79: Vmebus Interrupt Acknowledge Register 2 (Viar2)
Description 31-0 I2[31:0] Level 2 Interrupter Status ID These bits return the Status ID received during the IACK cycle. © National Instruments Corporation 4-39 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 80: Vmebus Interrupt Acknowledge Register 3 (Viar3)
Description 15-0 I3[15:0] Level 3 Interrupter Status ID These bits return the Status ID received during the IACK cycle. VME-MXI-2 User Manual 4-40 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 81: Vmebus Interrupt Acknowledge Register 4 (Viar4)
Description 31-0 I4[31:0] Level 4 Interrupter Status ID These bits return the Status ID received during the IACK cycle. © National Instruments Corporation 4-41 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 82: Vmebus Interrupt Acknowledge Register 5 (Viar5)
Description 15-0 I5[15:0] Level 5 Interrupter Status ID These bits return the Status ID received during the IACK cycle. VME-MXI-2 User Manual 4-42 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 83: Vmebus Interrupt Acknowledge Register 6 (Viar6)
Description 31-0 I6[31:0] Level 6 Interrupter Status ID These bits return the Status ID received during the IACK cycle. © National Instruments Corporation 4-43 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 84: Vmebus Interrupt Acknowledge Register 7 (Viar7)
Description 15-0 I7[15:0] Level 7 Interrupter Status ID These bits return the Status ID received during the IACK cycle. VME-MXI-2 User Manual 4-44 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 85: Vmebus A24/A32 Registers
(read only, write only, or read/write), access size, and register name. To enable access to the A24 or A32 space on the VME-MXI-2, first write the desired base address to the VXIbus Offset Register (VOR), then set the A24/A32 ENABLE bit in the VXIbus Control Register (VCR).
Page 86: Table 4-2. Vme-Mxi-2 Vmebus A24/A32 Register Map
Chapter 4 Register Descriptions Table 4-2. VME-MXI-2 VMEbus A24/A32 Register Map Offset Mnemonic (Hex) Access Type Access Size Register Name DMAICR Read/Write 16/8 bit DMA Interrupt Configuration DMAIER Read/Write 16/8 bit DMA Interrupt Enable DMAISIDR Read/Write 16/8 bit DMA Interrupt Status/ID...
Page 87: Dma Interrupt Configuration Register (Dmaicr)
8 bits during the IACK cycle. When this bit is clear, the VME-MXI-2 does not respond to 8-bit IACK cycles. This bit is cleared on a hard reset and is not affected by a soft reset.
Page 88 DMA interrupt. This bit should not be set when SID8 is clear. When this bit is set, the logical address of the VME-MXI-2 is used as the Status/ID information. When this bit is clear, the contents of the DMAISIDR are used. This bit is cleared on a hard reset and is not affected by a soft reset.
Page 89 7 and 1 for the DMA interrupt to operate properly. These bits are cleared on a hard reset and are not affected by a soft reset. © National Instruments Corporation 4-49 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 90: Dma Interrupt Enable Register (Dmaier)
These bits are reserved. Write each of these bits with 0 when writing the DMAIER. The value these bits return when read is meaningless. VME-MXI-2 User Manual 4-50 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 91 These bits are reserved. Write each of these bits with 0 when writing the DMAIER. The value these bits return when read is meaningless. © National Instruments Corporation 4-51 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 92: Dma Interrupt Status/Id Register (Dmaisidr)
(DMAICR), only the VME-MXI-2 module’s logical address is provided and this register is not used. If SID8 is clear in the DMAICR (16-bit Status/ID) this register provides the upper 8 bits of the Status/ID and the VME-MXI-2 module’s logical address is placed on the lower 8 bits.
Page 93 2 through 0 of the Status/ID. These bits return 011 (binary) during IACK cycles and 000 (binary) when read directly. © National Instruments Corporation 4-53 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 94: Vme-Mxi-2 Status/Control Register 2 (Vmsr2/Vmcr2)
VMEbus A24 or A32 Offset: 758 (hex) Attributes: Read/Write 32, 16, 8-bit accessible IOCONFIG This register enables access to the VME-MXI-2 onboard EEPROM. For more information on changing configuration settings in the EEPROM, refer to Appendix B, Programmable Configurations. Mnemonic Description 31-8 Reserved These bits are reserved.
Page 95 VMCR2. Reserved This bit is reserved. Write this bit with 1 when writing to the VMCR2. © National Instruments Corporation 4-55 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 96: Shared Mxibus Status/Control Register (Smsr/Smcr)
FAIR PAREN MBTO[3] MBTO[2] MBTO[1] MBTO[0] This register provides control bits for the configurable features of the MXIbus interface on the VME-MXI-2. Mnemonic Description 31-30 Reserved These bits are reserved. Write these bits with 0 when writing to the SMCR.
Page 97 FAIR MXIbus Fair Requester Setting this bit enables the MXIbus fair requester protocol. When this bit is clear, the VME-MXI-2 is an unfair requester on the MXIbus. Refer to Chapter 6, VXIplug&play for the VME-MXI-2, or Appendix B, Programmable Configurations, for more information on the Fair MXIbus Requester protocol.
Page 98 SMCR. PAREN MXIbus Parity Enable Setting this bit enables the checking of MXIbus parity. When this bit is clear, the VME-MXI-2 does not check MXIbus parity. Refer to Chapter 6, VXIplug&play for the VME-MXI-2, or Appendix B, Programmable Configurations, for more information on MXIbus parity checking.
Page 99 Register Descriptions The following table lists the values to write to these bits for all possible times. Refer to Chapter 6, VXIplug&play for the VME-MXI-2, or Appendix B, Programmable Configurations, for more information on the MXIbus timer. On a hard reset, these bits are initialized to the value stored in the onboard EEPROM for these bits.
Page 100: Dma Channel Operation Register (Chorx)
These bits are reserved. Write each of these bits with 0 when writing the CHORx. The value these bits return when read is meaningless. VME-MXI-2 User Manual 4-60 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 101 This bit is reserved. Write this bit with 0 when writing the CHORx. The value this bit returns when read is meaningless. © National Instruments Corporation 4-61 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 102 1 after setting the STOP bit. After setting the START bit, the DONE bit becomes clear and the DMA controller begins performing the operation. VME-MXI-2 User Manual 4-62 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 103: Dma Channel Control Register (Chcrx)
1 if it is disabled. The interrupt is disabled by a hard reset and is not affected by a soft reset. © National Instruments Corporation 4-63 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 104 These bits are reserved. Write each of these bits with 0 when writing the CHCRx. The value these bits return when read is meaningless. VME-MXI-2 User Manual 4-64 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 105: Dma Transfer Count Register (Tcrx)
The limit differs depending on the setting of the MXIbus Transfer Limit control in the VXIplug&play soft front panel, © National Instruments Corporation 4-65 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 106 Chapter 4 Register Descriptions which is described in Chapter 6, VXIplug&play for the VME-MXI-2. By default, the Transfer Limit is set to Unlimited; with this setting, the transfer count must not exceed 32 KB (8000 hex) if the source of the DMA operation will use synchronous MXIbus burst transfers.
Page 107: Dma Source Configuration Register (Scrx)
These bits are reserved. Write each of these bits with 0 when writing the SCRx. The value these bits return when read is meaningless. © National Instruments Corporation 4-67 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 108 This bit is cleared by a hard reset and is not affected by a soft reset. VME-MXI-2 User Manual 4-68 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 109 When the source is DRAM onboard the VME-MXI-2, these bits must be written with 0. These bits are cleared by a hard reset and are not affected by a soft reset.
Page 110: Dma Source Address Register (Sarx)
When the source is DRAM onboard the VME-MXI-2, these bits must be programmed with the offset of the source location within the VME-MXI-2 module’s address space, not the VMEbus address...
Page 111 Chapter 4 Register Descriptions of the source. To compute this value from the VMEbus address of the source, just subtract the VME-MXI-2 module’s A24 or A32 base address. © National Instruments Corporation 4-71 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 112: Dma Destination Configuration Register (Dcrx)
These bits are reserved. Write each of these bits with 0 when writing the DCRx. The value these bits return when read is meaningless. VME-MXI-2 User Manual 4-72 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 113 This bit is cleared by a hard reset and is not affected by a soft reset. © National Instruments Corporation 4-73 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 114 These bits control the bus on which the destination is located. Write these bits with 01 (binary) if the destination is DRAM onboard the VME-MXI-2, 10 (binary) if the destination is on the VMEbus, and 11 (binary) if the destination is on the MXIbus. These bits are cleared by a hard reset and are not affected by a soft reset.
Page 115: Dma Destination Address Register (Darx)
When the destination is DRAM onboard the VME-MXI-2, these bits must be programmed with the offset of the destination location within the VME-MXI-2 module’s address space, not the © National Instruments Corporation 4-75 VME-MXI-2 User Manual...
Page 116 Chapter 4 Register Descriptions VMEbus address of the destination. To compute this value from the VMEbus address of the destination, just subtract the VME-MXI-2 module’s A24 or A32 base address. VME-MXI-2 User Manual 4-76 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 117: Dma Channel Status Register (Chsrx)
DONE bit. Once it is determined that the DMA operation is done, the error condition bits in this register © National Instruments Corporation 4-77 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 118 Refer to the SERR[1:0] and DERR[1:0] bit descriptions to determine the type of error. VME-MXI-2 User Manual 4-78 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 119 RETRY* acknowledge for the 65th time, the DMA controller terminates the operation and sets the retry limit exceeded status in the DERR[1:0] bits. © National Instruments Corporation 4-79 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 120: Dma Fifo Count Register (Fcrx)
FCR[7:0] Full Count Register These bits indicate the number of bytes of data remaining in the FIFO. VME-MXI-2 User Manual 4-80 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 121: System Configuration
VMEbus/MXIbus system. If this is the case, consider “RM” in the remainder of this chapter to be your application that is configuring the address mapping on the VME-MXI-2 modules. You can connect a VMEbus/MXIbus system together to form any arbitrary tree topology.
Page 122: Planning A Vmebus/Mxibus System Logical Address Map
VMEbus devices that do not conform to the VXIbus register set. This allows the RM to configure the address mapping on the VME-MXI-2 module to include the address space used by those devices.
Page 123: Figure 5-1. Vmebus/Mxibus System With Multiframe Rm On A Pc
Level 1 Mainframe Mainframe Device Device VMEbus Level 2 Mainframe Figure 5-2. VMEbus/MXIbus System with Multiframe RM in a VMEbus Mainframe © National Instruments Corporation VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 124: Base/Size Configuration Format
MXIbus links before adding additional levels. System performance decreases as you increase the number of levels to the system because each level requires additional signal conversion. Also keep in mind these basic rules for VME-MXI-2 installation as you decide where to install your VME-MXI-2 interfaces: •...
Page 125: Figure 5-3. Base And Size Combinations
Size = 3 Size = 4 Size = 5 Size = 6 Size = 7 Figure 5-3. Base and Size Combinations © National Instruments Corporation VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 126: High/Low Configuration Format
Each address mapping window on a VME-MXI-2 interface has High and Low address parameters associated with it when the CMODE bit in the VME-MXI-2 Control Register (VMCR) is set. The High and Low values define the range of MXIbus addresses that map into the VMEbus.
Page 127: Steps To Follow When Planning A System Logical Address Map
As system integrator, when installing devices in the VMEbus/MXIbus system, you must assign a range of logical addresses for each VMEbus mainframe and MXIbus link. VME-MXI-2 modules and most other MXIbus devices use the VXIbus logical address scheme to locate their registers in A16 space.
Page 128: Figure 5-5. Example Vmebus/Mxibus System
MXIbus Device A MXIbus Device B VXIbus Mainframe #2 VMEbus Mainframe #3 VMEbus Mainframe #4 VMEbus Mainframe #5 VMEbus Mainframe #6 VME-MXI-2 User Manual © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 129 VMEbus mainframe on Level 1, you must change the logical addresses of both VME-MXI-2 modules so that they are not at the default of 1. Select a logical address that is greater than or equal to the number of logical addresses required by the mainframe.
Page 130 Refer to Table 5-1 and Figure 5-4 for example logical address allocations for different Size values. VME-MXI-2 User Manual 5-10 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 131: Figure 5-6. Logical Address Map Diagram For Example Vmebus/Mxibus System
64 divisible by a power of two is 40 to 7F hex. The other first-level MXIbus link, MXIbus #2, needs only one logical address. It is assigned the lowest available logical address, 2 hex. © National Instruments Corporation 5-11 VME-MXI-2 User Manual...
Page 132 Mainframe #3, needs four logical addresses. This device has a second-level MXIbus link that needs two logical addresses, and the mainframe needs two logical addresses for its own VME-MXI-2 modules. First, assign the devices in the mainframe to the lowest available range within the allocated address range of MXIbus #1—...
Page 133: Figure 5-7. Worksheet 1: Summary Of Example Vmebus/Mxibus System
Size = (If this number is greater than 256, you need to reorganize devices and try again.) Figure 5-7. Worksheet 1: Summary of Example VMEbus/MXIbus System © National Instruments Corporation 5-13 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 134: Figure 5-8. Worksheet 2 For Mxibus #1 Of Example Vmebus/Mxibus System
Round Total Number up to Next Power of Two: 64 (2 Size = 8-6 = 2 Figure 5-8. Worksheet 2 for MXIbus #1 of Example VMEbus/MXIbus System VME-MXI-2 User Manual 5-14 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 135: Figure 5-9. Worksheet 3 For Mxibus #2 Of Example Vmebus/Mxibus System
Round Total Number up to Next Power of Two: 2 (2 Size = 8-1 = 7 Figure 5-10. Worksheet 4 for MXIbus #3 of Example VMEbus/MXIbus System © National Instruments Corporation 5-15 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 136: Worksheets For Planning Your Vmebus/Mxibus Logical Address Map
8F-80 7F-70 6F-60 5F-50 4F-40 3F-30 2F-20 1F-10 0F-00 Figure 5-11. Logical Address Map Diagram for Your VMEbus/MXIbus System VME-MXI-2 User Manual 5-16 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 137: Figure 5-12. Worksheet 1: Summary Of Your Vmebus/Mxibus System
Note: You may need to make more copies of the blank forms if your system consists of more than three MXIbus links. © National Instruments Corporation 5-17 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 138: Figure 5-13. Worksheet 2 For Mxibus #1 Of Your Vmebus/Mxibus System
Round Total Number up to Next Power of Two: Size = Figure 5-13. Worksheet 2 for MXIbus #1 of Your VMEbus/MXIbus System VME-MXI-2 User Manual 5-18 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 139: Figure 5-14. Worksheet 3 For Mxibus #2 Of Your Vmebus/Mxibus System
Round Total Number up to Next Power of Two: Size = Figure 5-14. Worksheet 3 for MXIbus #2 of Your VMEbus/MXIbus System © National Instruments Corporation 5-19 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 140: Figure 5-15. Worksheet 4 For Mxibus #3 Of Your Vmebus/Mxibus System
Round Total Number up to Next Power of Two: Size = Figure 5-15. Worksheet 4 for MXIbus #3 of Your VMEbus/MXIbus System VME-MXI-2 User Manual 5-20 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 141: Alternative Worksheets For Planning Your Vmebus/Mxibus Logical Address Map
With High/Low configuration, you can configure each VME-MXI-2 window for exactly the amount of address space the mainframe needs. Figure 5-17 is an alternative logical address map worksheet for you to fill out for your VMEbus/MXIbus system.
Page 142: Figure 5-16. Alternative Worksheet: Logical Address Map For Example Vmebus/Mxibus System
Range OUT Range OUT Range OUT Range OUT Figure 5-16. Alternative Worksheet: Logical Address Map for Example VMEbus/MXIbus System VME-MXI-2 User Manual 5-22 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 143: Figure 5-17. Alternative Worksheet: Logical Address Map For Your
Range OUT Range OUT Range OUT Range OUT Figure 5-17. Alternative Worksheet: Logical Address Map for Your VMEbus/MXIbus System © National Instruments Corporation 5-23 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 144: Planning A Vmebus/Mxibus System A16 Address Map
512 B 1 KB 2 KB 4 KB 8 KB 16 KB 32 KB 48 KB (All A16 space) VME-MXI-2 User Manual 5-24 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 145: Figure 5-18. A16 Space Allocations For All Size Values
Table 5-3. Next, assign the A16 space, starting with the root device and working down the VMEbus/MXIbus system tree. To assist you in configuring the A16 window map on the VME-MXI-2 interfaces in your system, the following pages include worksheets, an address map diagram, and an example.
Page 146 The next step is to determine the range of addresses, or base address, size, and direction of the A16 window for each VME-MXI-2 in the system. We first assign A16 space to the VMEbus RM Mainframe. From Figure 5-21, we see it needs 16 KB of A16 space, so we assign it the bottom 16 KB of A16 space, addresses 0 through 3FFF hex.
Page 147 System Configuration 10. Each first-level MXIbus link is connected to the RM through a VME-MXI-2. The A16 window for MXIbus link #1 is 16 KB in size. We assign the next lowest available 16 KB portion of A16 space to MXIbus link #1, which is address range 4000 to 7FFF hex.
Page 148: Figure 5-19. Example Vmebus/Mxibus System Diagram
VMEbus Mainframe #3 4 KB VMEbus Mainframe #4 2 KB VMEbus Mainframe #5 1 KB VMEbus Mainframe #6 2 KB VME-MXI-2 User Manual 5-28 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 149: Figure 5-20. Example A16 Space Address Map Diagram
4FFF-4000 VMEbus Mainframe #3 3FFF-3000 VMEbus Mainframe #1 2FFF-2000 1FFF-1000 0FFF-0000 Figure 5-20. Example A16 Space Address Map Diagram © National Instruments Corporation 5-29 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 150: Figure 5-21. Worksheet 1: Summary Of A16 Address Map Example
Round up to next address break: 16 KB First-Level MXIbus Link: MXIbus #1 8 KB + 512 Amount of A16 space required for devices connected to this VME-MXI-2: 16 KB Round up to next address break: 4000 A16 Window: Base...
Page 151: Figure 5-22. Worksheet 2 For Mxibus #1 Of A16 Address Map Example
Total amount of A16 space required for this window: Round up total amount to the next address size break: First-Level VME-MXI-2: A16 Window: Base: Size: Direction: Second-Level VME-MXI-2 #1: A16 Window: Base: Size: Direction: Second-Level VME-MXI-2 #2: A16 Window: Base:...
Page 152 Total amount of A16 space required for this window: 8 KB Round up total amount to the next address size break: First-Level VME-MXI-2: 4000 A16 Window: Base: Size: Direction: MXIbus #3 Second-Level VME-MXI-2 #1: 5000 A16 Window: Base: Size: Direction: Second-Level VME-MXI-2 #2: A16 Window: Base: Size: Direction: Figure 5-22.
Page 153: Figure 5-23. Worksheet 3 For Mxibus #3 Of A16 Address Map Example
Total amount of A16 space required for this window: 2 KB Round up total amount to the next address size break: First-Level VME-MXI-2: 5000 A16 Window: Base: Size: Direction: Second-Level VME-MXI-2 #1: A16 Window: Base: Size: Direction: Second-Level VME-MXI-2 #2: A16 Window: Base: Size:...
Page 154: Worksheets For Planning Your Vmebus/Mxibus A16 Address Map
7FFF-7000 6FFF-6000 5FFF-5000 4FFF-4000 3FFF-3000 2FFF-2000 1FFF-1000 0FFF-0000 Figure 5-24. A16 Space Address Map Diagram for Your VMEbus/MXIbus System VME-MXI-2 User Manual 5-34 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 155: Figure 5-25. Worksheet 1: Summary Of Your A16 Address Map
Resource Manager Mainframe: Amount of A16 space required for this mainframe: Round up to next address break: First-Level MXIbus Link: Amount of A16 space required for devices connected to this VME-MXI-2: Round up to next address break: A16 Window: Base...
Page 156: Figure 5-26. Worksheet 2 For Mxibus #1 A16 Address Map
Total amount of A16 space required for this window: Round up total amount to the next address size break: First-Level VME-MXI-2: A16 Window: Base: Size: Direction: Second-Level VME-MXI-2 #1: A16 Window: Base: Size: Direction: Second-Level VME-MXI-2 #2: A16 Window: Base:...
Page 157 Total amount of A16 space required for this window: Round up total amount to the next address size break: First-Level VME-MXI-2: A16 Window: Base: Size: Direction: Second-Level VME-MXI-2 #1: A16 Window: Base: Size: Direction: Second-Level VME-MXI-2 #2: A16 Window: Base:...
Page 158 Total amount of A16 space required for this window: Round up total amount to the next address size break: First-Level VME-MXI-2: A16 Window: Base: Size: Direction: Second-Level VME-MXI-2 #1: A16 Window: Base: Size: Direction: Second-Level VME-MXI-2 #2: A16 Window: Base:...
Page 159 Total amount of A16 space required for this window: Round up total amount to the next address size break: First-Level VME-MXI-2: A16 Window: Base: Size: Direction: Second-Level VME-MXI-2 #1: A16 Window: Base: Size: Direction: Second-Level VME-MXI-2 #2: A16 Window: Base:...
Page 160: Multiframe Rm Operation
DC devices in the mainframe to the lowest unused logical addresses. Records all logical addresses found and allocated. VME-MXI-2 User Manual 5-40 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 161: Configuring The Logical Address Window Example
RM to find all devices connected on a MXIbus link. Therefore, each device must have a logical address that was configured before the RM executes. © National Instruments Corporation 5-41 VME-MXI-2 User Manual...
Page 162: Vme-Mxi-2
VMEbus Mainframe #1. Finds the VME-MXI-2 interfaces at logical addresses 0 and 1. Enables the logical address window of the VME-MXI-2 found at logical address 0 for the entire outward mapping range of 0 to FF. Scans all logical addresses, skipping all previously encountered...
Page 163 VMEbus Mainframe #4 (62) and the VME-MXI-2 in VMEbus Mainframe #5 (63). Enables the logical address window of the VME-MXI-2 at logical address 61 with an outward range of 62 to 63 by writing the value 4762 hex to the Logical Address Window Register (Base/Size format).
Page 164: Configuring The A24 And A32 Addressing Windows
VME-MXI-2 in VMEbus Mainframe #6 (2). Enables the logical address window of the VME-MXI-2 at logical address 1 with an outward range of 2 to 3 by writing the value 4702 hex to the Logical Address Window Register (Base/Size format).
Page 165: Vxi Plug&Play For The Vme-Mxi-2
Use the soft front panel to configure programmable features on the VME-MXI-2. Because this same soft front panel also works with the VXI-MXI-2, you can easily configure a hybrid VXI/VME system. The settings that you change using the soft front panel are stored in the user-configurable half of the EEPROM on the VME-MXI-2.
Page 166: Using The Soft Front Panel
VXIplug&play disk. Before running the soft front panel, you must enable A24 or A32 accesses to the VME-MXI-2 that you want to configure. You can do this either by using a VXIbus Resource Manager or by programming the VXIbus Offset Register (VOR) and setting the A24/A32 ENABLE bit in the VXIbus Control Register (VCR) as described in the VMEbus A24/A32 Registers section of Chapter 4, Register Descriptions.
Page 167: Board Settings
VXI/VME-MXI-2 it finds upon execution. The top-center area of the panel indicates whether the currently selected instrument is a VXI-MXI-2 or a VME-MXI-2. Notice that this area of the panel also displays the serial number and hardware revision of the currently selected instrument.
Page 168: Address Space And Requested Memory
A24 space or A32 space. Use the Requested Memory control to set the amount of memory space that the VME-MXI-2 will require. You can select up to 8 MB in A24 space and up to 2 GB in A32 space.
Page 169: Interlocked
Extender A24 window and Extender A32 window from the VMEbus to the MXIbus and vice-versa. This control also affects write cycles to the VME-MXI-2 module via its requested memory space from both the VMEbus and the MXIbus. For more information on the A16, A24, and A32 windows, refer to Chapter 4, Register Descriptions.
Page 170 In Chapter 4, Register Descriptions, the INTLCK bit is described in the VME-MXI-2 Control Register (VMCR) section. You can use this bit to enable the interlocked mode of arbitration. However, you may prefer to have the VME-MXI-2 automatically enable interlocked mode during its self-configuration, so that you do not need to access the INTLCK bit at each power-on.
Page 171: Vme Bus Settings
Figure 6-2. VME-MXI-2 VMEbus Settings System Controller You can use the System Controller control to override the automatic first slot detection circuit on the VME-MXI-2. When the control is set to Auto (the default setting), the first slot detection circuit will be active.
Page 172: Bus Timeout
256 ms. The default value is 125 µs. Arbiter Type You can use the Arbiter Type feature to configure the VME-MXI-2 as either a Priority or Round Robin VMEbus arbiter. This control is applicable only if the VME-MXI-2 you are configuring is a VMEbus System Controller device.
Page 173: Arbiter Timeout
The VME-MXI-2 uses VMEbus request level 3 in its factory-default setting. This is suitable for most systems. However, you can change the VME-MXI-2 to use any of the other three request levels (0, 1, or 2) by changing the setting of the Request Level control. You may want to change request levels to change the priority of the VME-MXI-2 request signal.
Page 174: Auto Retry
MXI cycle until it receives either a DTACK or BERR response, which it then passes to the VMEbus. Notice that the VME-MXI-2 has a limit on the number of automatic retries it will perform on any one cycle. If the limit is exceeded and the VME-MXI-2 receives another retry, it will pass a retry back to the VMEbus even though Auto Retry is enabled.
Page 175: System Controller
The other options you can choose from are 16, 64, and 256 transfers. If you do not want the VME-MXI-2 to hold the MXIbus for an unlimited period of time, you can use this control to select one of these values.
Page 176: Auto Retry
MXIbus only when there are no requests pending from other masters. This prevents other MXIbus masters from being starved of bandwidth. The VME-MXI-2 will request the bus at any time when this setting is disabled (unfair requester). VME-MXI-2 User Manual 6-12 ©...
Page 177 VXIplug&play disk in this kit. This file conforms to VPP-5, VXI Component Knowledge Base Specification. This file contains detailed information about the VME-MXI-2 such as address space requirements and power consumption. The knowledge base file is intended to be used with software tools that aid in system design, integration, and verification.
Page 178: National Instruments Corporation Vii Vme-Mxi-2 User Manual
Appendix Specifications This appendix lists various module specifications of the VME-MXI-2, such as physical dimensions and power requirements. MXIbus Capability Descriptions • Master-mode A32, A24 and A16 addressing • Master-mode block transfers and synchronous block transfers • Slave-mode A32, A24, and A16 addressing •...
Page 179 VMEbus D32, D16, D08(O) interrupter (Interrupter) ROAK, RORA Release on Acknowledge or Register Access interrupter BTO(x) VMEbus bus timer (programmable limit) VME-MXI-2 User Manual © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 180 Fully compatible with VMEbus specification MTBF 97,000 hours at 25° C Weight 0.33 Kg (0.73 lb) typical (no DRAM installed) © National Instruments Corporation VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 181 DC Current Ratings Source Typical Maximum +5 VDC 2.2 A 3.2 A Performance VME Transfer Rate Peak 33 MB/s Sustained 23 MB/s VME-MXI-2 User Manual © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 182 A32 space to the VME-MXI-2 before the EEPROM can be accessed. If you are not using a multiframe VXIbus Resource Manager, you must allocate A24 or A32 space to the VME-MXI-2 by writing a base address to the VOR and then setting the A24/A32 ENABLE bit in the VCR.
Page 183 After all changes have been written to the EEPROM, the 32-bit value stored at offset 2FFC hex from the VME-MXI-2 A24 or A32 base address should be incremented. This 32-bit value stores the number of times the EEPROM has been written, since there is a limit of 10,000 writes before writes to the part become unreliable.
Page 184 EEPROM on the VME-MXI-2. VME-MXI-2 Requested Memory Space The VME-MXI-2 requires at least 16 KB of either A24 or A32 space. You might want to change the amount of space requested or whether the VME-MXI-2 is an A24 or A32 device. This is especially important when changing the amount of DRAM installed on the VME-MXI-2.
Page 185 Appendix B Programmable Configurations To change the amount of space that the VME-MXI-2 requests, write the EEPROM byte at offset 201E hex from the VME-MXI-2 base address. The following table gives the value that should be written for the corresponding size. Notice that the value you should write for any given size differs depending on whether you are requesting A24 or A32 space.
Page 186 The lowest value in the allowable range is 15 µs and the highest is 256 ms. The default value is 125 µs. To change the VMEbus timeout limit of the VME-MXI-2, write the EEPROM byte at offset 206F hex from the VME-MXI-2 base address.
Page 187 Programmable Configurations VMEbus Arbiter Arbiter Type You can configure the VME-MXI-2 as either a Priority or Round Robin VMEbus arbiter. This setting is applicable only if the VME-MXI-2 you are configuring is the first slot device. The default is Priority.
Page 188 The VME-MXI-2 uses VMEbus request level 3 in its factory-default setting. This is suitable for most VMEbus systems. However, you can change the VME-MXI-2 to use any of the other three request levels (0, 1, or 2) by writing to the EEPROM. You may want to change request levels to change the priority of the VME-MXI-2 request signal.
Page 189 MXIbus cycle maps to the VMEbus through a VME-MXI-2. To change the MXIbus timeout limit of the VME-MXI-2, write the EEPROM byte at offset 2067 hex from the VME-MXI-2 base address. The following table gives the value that should be written for the corresponding time limit.
Page 190 Programmable Configurations MXIbus Fair Requester and MXIbus Parity Checking You can configure whether the VME-MXI-2 acts as either a fair or unfair requester on the MXIbus. The default is a fair requester, which causes the VME-MXI-2 to request the MXIbus only when there are no requests pending from other masters.
Page 191 183105x-01, where x is the hardware revision letter. Front Panel Figure C-1 shows the front panel layout of the VME-MXI-2. The drawing shows dimensions relevant to key elements on the front panel. Dimensions are in mm (inches). The VME-MXI-2 front panel thickness is 2.49 mm (.098 in.).
Page 192 Appendix C VME-MXI-2 Front Panel Configuration 2.67 (inches) (.105) SYSFAIL 70.13 (2.76) MXIbus RESET Figure C-1. VME-MXI-2 Front Panel Layout VME-MXI-2 User Manual © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 193: Table C-1. Mxi-2 Connector Signal Assignments
Meritec (Meritec part number 182800A-01). The mating cable assembly is National Instruments part number 182801A-xxx, where xxx is the length in meters. Figure C-2 shows the MXI-2 connector on the VME-MXI-2. The drawing shows the pinout assignments for each pin, which are described in Table C-1.
Page 194 Appendix C VME-MXI-2 Front Panel Configuration Table C-1. MXI-2 Connector Signal Assignments (Continued) Signal Name Signal Name Signal Name Signal Name AD(27)* AD(10)* AM(0)* IRQ(4)* AD(26)* AD(9)* IRQ(5)* AD(25)* AD(8)* SIZE* IRQ(6)* AD(24)* AD(7)* DISBTO* IRQ(7)* AD(23)* AD(6)* ACFAIL* TRG(0)+...
Page 195: Table C-2. Mxibus Signal Characteristics
Appendix C VME-MXI-2 Front Panel Configuration The characteristic impedance of the MXIbus signals is 120 Ω. Table C-2 lists additional characteristics of the MXIbus signals. Table C-2. MXIbus Signal Characteristics Signal Category Voltage Frequency Range Current Range Each single-ended 0 to 3.4 V...
Page 196 VME-MXI and the VME-MXI-2 This appendix describes the differences and incompatibilities between the first-generation MXIbus-to-VMEbus interface, the VME-MXI, and the VME-MXI-2. This information may be helpful for users of the VME-MXI who are moving to the VME-MXI-2. MXIbus Connector The VME-MXI-2 interfaces the VMEbus to the National Instruments next-generation MXIbus (MXI-2), while the VME-MXI used the first- generation MXIbus.
Page 197 One configuration switch on the VME-MXI selected whether the front-panel pushbutton asserted the VMEbus SYSRESET* or ACFAIL* signal. This is not implemented on the VME-MXI-2. The VME-MXI-2 will always assert SYSRESET* when the front-panel pushbutton is pressed.
Page 198 VME-MXI. Required Memory Space The VME-MXI-2 register set is too large to fit in its 64-byte VXIbus configuration area. In addition, you can install onboard DRAM on the VME-MXI-2. For both of these reasons the VME-MXI-2 requests at least 16 KB of either A24 or A32 space, whereas the VME-MXI was an A16-only device.
Page 199 Appendix D Differences and Incompatibilities between the VME-MXI and the VME-MXI-2 The MXSRSTINT, MXACFAILINT, and MXSYSFINT bits are no longer implemented in the VME-MXI-2 Status Register (VMSR). Likewise, the MXSRSTEN and MXACFAILEN bits in the VME-MXI-2 Control Register (VMCR) are no longer implemented.
Page 200 This register was unaffected by a hard reset on the VME-MXI. The INTLK bit in the VME-MXI-2 Status Register (VMSR) is set to the value stored in the EEPROM on a hard reset. By default, the value is 0.
Page 201: System
Configuring Two VME-MXI-2 Modules for a Two-Frame System The factory configuration of the VME-MXI-2 is suitable for the most common system configurations. However, if you are setting up a VME system using VME-MXI-2 modules to extend from one mainframe to another, you need to reconfigure the VME-MXI-2 interfaces.
Page 202 In the example shown in Figure E-1, Frame A contains a VME-MXI-2 installed in a slot other than the first slot. It is logical address 1. Frame B contains a VME-MXI-2 installed in the first slot. It is logical address 80 hex.
Page 203 Figure E-2. A16 Base Address Selection VMEbus First Slot The VME-MXI-2 automatically detects if it is installed in the first slot. Because of the automatic detection feature, you can install the VME-MXI-2 in any slot of a VMEbus mainframe. In the two-frame system described in this appendix, the VME-MXI-2 is installed in the first slot in Frame B, but in a different slot in Frame A.
Page 204 Configuring a Two-Frame System VMEbus BTO Unit In each mainframe, the VME-MXI-2 must be the sole bus timer on the VMEbus regardless of its slot location within the mainframe. Be sure to disable the bus timers on all other modules in the mainframes for proper operation.
Page 205 DMA Programming Examples This appendix contains two example programs for using the DMA controllers on the VME-MXI-2. If you are using a version of the National Instruments NI-VXI software that has remote DMA controller functionality, this information is not necessary because you can make use of the VME-MXI-2 module’s DMA controllers from the NI-VXI...
Page 206 ADDRESS represents the address in the memory space to which to • perform the write or read. In the examples, A24BASE represents the base A24 address of the VME-MXI-2. Any register name in the examples represents the offset of that register defined in Chapter 4, Register Descriptions.
Page 207 Remember that if the source is DRAM onboard the VME-MXI-2, the address modifier code should be written with 0. This step can be skipped if SCR1 was already written with the same value from a previous DMA operation.
Page 208 VMEbus address of the source. To compute this value from the source's VMEbus address, just subtract the VME-MXI-2 module's A24 or A32 base address. */ write(A24, A24BASE + SAR1, LONGWORD, 0x00200000); /* The following write sets up the DMA Destination Configuration Register.
Page 209 A32 space beginning at address location 40000000 hex. MXIbus 32-bit synchronous burst cycles are used to write data to the destination. © National Instruments Corporation VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 210 CHSRx will be using bandwidth on whichever bus (VMEbus or MXIbus) the host is located. The bandwidth the host is using to poll CHSRx will not be available to the VME-MXI-2 module’s DMA controller. Using the DMA interrupt alleviates this problem since the host is not required to poll.
Page 211 You can change this write if you prefer an 8-bit Status ID. If you select an 8-bit Status ID you should also decide if you want the contents of the DMAISIDR or the VME-MXI-2 module's logical address returned during the interrupt acknowledge cycle.
Page 212 VMEbus address of the source. To compute this value from the source's VMEbus address, just subtract the VME-MXI-2 module's A24 or A32 base address. */ write(A24, A24BASE + SAR1, LONGWORD, 0x00200000); /* The following write sets up the DMA Destination Configuration Register.
Page 213 /* The following write sets up the base address at which the data will be written to the destination. Remember that if the destination is DRAM onboard the VME-MXI-2, the offset within the module's space should be written to this register, not the VMEbus address of the destination.
Page 214 VME-MXI-2 module's DMA interrupt condition (assuming the logical address of the VME-MXI-2 module is 1). The upper bits of the Status ID code were written to the DMAISIDR in the Initialization section of this example.
Page 215 /* The interrupt service routine should never reach this point. If it did, it would indicate that the Status ID of the VME-MXI-2 module's DMA interrupt condition was returned during the interrupt acknowledge cycle yet neither DMA controller indicated it was interrupting.
Page 216 Reserved Reserved Reserved Reserved Reserved Reserved A16 supervisory access Reserved Reserved Reserved A16 nonprivileged access Reserved Reserved Reserved (continues) VME-MXI-2 User Manual F-12 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 217 A32 supervisory block transfer A32 supervisory program access A32 supervisory data access A32 supervisory 64-bit block transfer A32 nonprivileged block transfer (continues) © National Instruments Corporation F-13 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 218 A32 nonprivileged program access A32 nonprivileged data access A32 nonprivileged 64-bit block transfer Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved VME-MXI-2 User Manual F-14 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 219 The mnemonic types are abbreviated as follows: Abbreviation Meaning MXIbus Signal MXIbus Terminology Register VMEbus Signal VMEbus Terminology VXIbus Terminology © National Instruments Corporation VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 220 VMEbus ACFAIL* Interrupt Status AM[5:0] Address Modifiers ASCEND Ascending Addresses BERR* VBS/MBS Bus Error BKOFF Back Off Status BKOFFIE Back Off Interrupt Enable VME-MXI-2 User Manual © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 221 DMASID[7:3] DMA Status/ID 7 through 3 DMA1MBS DMA Controller 1 MXIbus Block Select DMA2MBS DMA Controller 2 MXIbus Block Select © National Instruments Corporation VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 222 IACK* VMEbus Interrupt Acknowledge ILVL[2:0] DMA Interrupt Level DMA Interrupt INTDIR[7:1] Interrupt Direction INTEN[7:1] Interrupt Enable INTLCK Interlocked Mode/Interlocked Status VME-MXI-2 User Manual © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 223 MXIbus System Controller Timeout Status OFFSET[15:0] VMEbus Offset PAREN MXIbus Parity Enable PARERR Parity Error Status PASSED Passed PORT[1:0] Port © National Instruments Corporation VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 224 SFINT VMEbus SYSFAIL* Interrupt Status SFOUT SYSFAIL* Out SID8 8-bit Status/ID SIDLA Logical Address Status/ID SMCR Shared MXIbus Control Register VME-MXI-2 User Manual © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 225 VMEbus Interrupt Acknowledge Register 4 VIAR5 VMEbus Interrupt Acknowledge Register 5 VIAR6 VMEbus Interrupt Acknowledge Register 6 VIAR7 VMEbus Interrupt Acknowledge Register 7 © National Instruments Corporation VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 226 VXIbus Interrupt Configuration Register VICTR VMEbus Interrupt Control Register VIDR VXIbus ID Register VISTR VMEbus Interrupt Status Register VLAR VME-MXI-2 Logical Address Register VMEbus Lock Register VMCR VME-MXI-2 Control Register VMCR2 VME-MXI-2 Control Register 2 VMSR VME-MXI-2 Status Register VMSR2...
Page 227 Electronic Services Bulletin Board Support National Instruments has BBS and FTP sites dedicated for 24-hour support with a collection of files and documents to answer most common customer questions. From these sites, you can also download the latest instrument drivers, updates, and example programs. For recorded instructions on how to use the bulletin board and FTP services and for BBS automated information, call (512) 795-6990.
Page 228 Fax and Telephone Support National Instruments has branch offices all over the world. Use the list below to find the technical support number for your country. If there is no National Instruments office in your country, contact the source from which you purchased your software to obtain support.
Page 229 National Instruments for technical support helps our applications engineers answer your questions more efficiently. If you are using any National Instruments hardware or software products related to this problem, include the configuration forms from their user manuals. Include additional pages if necessary.
Page 230 Complete a new copy of this form each time you revise your software or hardware configuration, and use this form as a reference for your current configuration. Completing this form accurately before contacting National Instruments for technical support helps our applications engineers answer your questions more efficiently.
Page 231 VMEbus Fair Requester __________________________________________________________ VMEbus Request Level __________________________________________________________ VMEbus Transfer Limit __________________________________________________________ VMEbus Auto Retry _____________________________________________________________ MXIbus System Controller ________________________________________________________ MXIbus Bus Timeout ____________________________________________________________ MXIbus Transfer Limit ___________________________________________________________ MXIbus Auto Retry ______________________________________________________________ MXIbus Parity Checking __________________________________________________________ MXIbus Fair Requester ___________________________________________________________ Programmable Configurations (Appendix B) Requested Memory Space _________________________________________________________ VMEbus Timer Limit ____________________________________________________________...
Page 232 Operating System _______________________________________________________________ Operating System Version ________________________________________________________ Operating System Mode __________________________________________________________ Other MXIbus Devices in System ___________________________________________________ ______________________________________________________________________________ Other VMEbus Devices in System __________________________________________________ ______________________________________________________________________________ Base I/O Address of Other Boards __________________________________________________ DMA Channels of Other Boards ____________________________________________________ Interrupt Level of Other Boards ____________________________________________________ VXIbus Resource Manager used (if any) (Make, Model, Version, Software Version) ___________________________________________ Artisan Technology Group - Quality Instrumentation ...
Page 233 Documentation Comment Form National Instruments encourages you to comment on the documentation supplied with our products. This information helps us provide quality products to meet your needs. Title: VME-MXI-2 User Manual Edition Date: January 1996 Part Number: 321071A-01 Please comment on the completeness, clarity, and organization of the manual.
Page 234 A16 space is allocated for use by VXI devices configuration registers. This 16 KB region is referred to as VXI configuration space. © National Instruments Corporation Glossary-1 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 235 Glossary A24/A32 Decoder The logic circuit on the VME-MXI-2 that is responsible for detecting data transfers to the module’s registers or DRAM in A24 or A32 address space. A24 space The VME 16 MB standard address space. A32 space The VME 4 GB extended address space.
Page 236 In VME, the data transfer may have no more than 256 elements; MXI does not have this restriction. © National Instruments Corporation Glossary-3 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 237 VXIbus devices exist. controller An intelligent device (usually involving a CPU) that is capable of controlling other devices. VME-MXI-2 User Manual Glossary-4 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 238 An intelligent CPU (controller) interface plugged directly into the VME backplane, giving it direct access to the VMEbus. It must have all of its required VME interface capabilities built in. © National Instruments Corporation Glossary-5 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 239 Occurs when the mainframe is powered on and when the VMEbus SYSRESET signal is active. A hard reset restores all the registers on the VME-MXI-2 to their initial values. Hexadecimal; the numbering system with base 16, using the digits 0 to 9 and letters A to F.
Page 240 VME-MXI. It extends the seven VMEbus interrupt lines and the VMEbus utility signals SYSRESET*, SYSFAIL*, and ACFAIL*. This functionality is built into the VME-MXI-2, so this daughter card is not required. inward cycle A data transfer cycle that maps from the MXIbus to the VMEbus.
Page 241 Megabytes of memory meters mainframe extender A device such as the VME-MXI-2 that interfaces a VMEbus mainframe to an interconnect bus. It routes bus transactions from the VMEbus to the interconnect bus or vice versa. A mainframe extender has a set of registers that defines the routing mechanisms for data transfers, interrupts, and utility bus signals, and has optional VMEbus first slot capability.
Page 242 MXI-2 The second generation of the National Instruments MXIbus product line. MXI-2 expands the number of signals on a standard MXIbus cable by including VXI triggers, all VME interrupts, VXI CLK10, SYSFAIL*, SYSRESET*, and ACFAIL*.
Page 243 MODID, and CLK10 signals. A third connector defined by the VXIbus specification that adds a 100 MHz CLK and additional triggering capabilities. The VME-MXI-2 does not have support for P3. parity Ensures that there is always either an even number or an odd number of asserted bits in a byte, character, or word, according to the logic of the system.
Page 244 Signal register. Sending a signal requires that the sending device have VMEbus master capability. SIMM Single In-line Memory Module © National Instruments Corporation Glossary-11 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 245 Occurs when the RESET bit in the VXIbus Control Register of the VME-MXI-2 is set. A soft reset clears signals that are asserted by bits in the configuration registers but does not clear configuration information stored in the configuration registers.
Page 246 RAM RAM installed on your personal computer and used by the operating system, as contrasted with onboard RAM, which is installed on the VME-MXI-2. terminators Also called terminating networks; devices located at the ends of a MXIbus daisy-chain that are used to minimize reflections and bias signals to their unasserted states.
Page 247 VXIbus system. It utilizes the A16 communication registers to transfer data using a simple polling handshake method. VME-MXI-2 User Manual Glossary-14 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 248 ACCDIR bit, 4-7 summary of A16 address map, 5-35 ACFAIL bit, 4-34 example, 5-30 ACFIN bit, 4-22 ACFOUT bit, 4-22 © National Instruments Corporation Index-1 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 249 VMEbus, 2-6 A16SIZE[2:0], 4-14 address map, A16. See A16 address map. A24/A32 ACTIVE, 4-6 address mapping, two-frame system, E-4 A24/A32 ENABLE, 4-8 Address Space control, VME-MXI-2, 6-4 A24BASE[7:0], 4-16 ADSPC[1:0] bits, 4-4 A24DIR, 4-16 AFIE bit, 4-36 A24EN, 4-15 AFINT bit, 4-33...
Page 250 PARERR, 4-27 overview, 2-5 PASSED, 4-1, 4-7 two-frame system, E-4 PORT[1:0], 4-69, 4-74 POSTERR, 4-25 READY, 4-7 REQMEM[3:0], 4-5 © National Instruments Corporation Index-3 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 251 (VMSR), 4-25 differences between VME-MXI and configuration, 3-1 to 3-11. See also system VME-MXI-2. See incompatibilities configuration; VME-MXI-2 between VME-MXI and VME-MXI-2. VXIplug&play soft front panel. DIRQ[7:1] bits, 4-36 damage from electrostatic discharge DMA Channel Control Register (CHCRx), (warning), 3-1...
Page 252 E-3 interlocked arbitration mode, B-9 FRESET bit, 4-61 jumper and switch settings, 3-8 to 3-9 front panel, VME-MXI-2. See VME-MXI-2 MXIbus fair requester and MXIbus front panel; VME-MXI-2 VXIplug&play parity checking, B-9 soft front panel.
Page 253 I6[31:0] bits, 4-43 IRQ[7:1] bits, 4-34 I7[15:0] bits, 4-44 ISTAT bit, 4-48 ILVL[2:0] bits, 4-49 incompatibilities between VME-MXI and VME-MXI-2, D-1 to D-5 configuration switches and jumper and switch settings jumpers, D-2 A16 base address, 3-3 to 3-4 hard reset, D-5...
Page 254 MXIbus #2 of example configuring for two-frame system, VMEbus/MXIbus system, 5-15 E-2 to E-3 MXIbus #2 of VMEbus/MXIbus Logical Address control, VME-MXI-2, system, 5-19 6-3 to 6-4 MXIbus #3 of example Logical Address Selection control, VMEbus/MXIbus system, 5-15...
Page 255 MXSCTO bit, 4-26 example VMEbus/MXIbus system (table), 5-42 overview, 5-1 OFFSET[15:0] bits, 4-10 MXI-2. See also VME-MXI-2. onboard DRAM, 3-10 to 3-11 address/data and address modifier avoiding first 4 KB of memory space transceivers, 2-6 (caution), 6-4, B-3...
Page 256 MXI-2, 2-5 VXIbus Configuration Registers. VMEbus, 2-4 REQMEM[3:0] bits, 4-5 slot detection, two-frame system, E-3 request level, VME-MXI-2, 6-9 soft front panel. See VME-MXI-2 Requested Memory control, VXIplug&play soft front panel. VME-MXI-2, 6-4 soft reset of registers requested memory space, VXI-MXI-2,...
Page 257 VMEbus/MXIbus installing in different slot system (table), 5-8 (warning), 6-8 steps to follow, 5-7 to 5-12 overview, 2-3 VME-MXI-2 User Manual Index-10 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 258 DMA Transfer Count Register (TCRx), 4-65 to 4-66 hard and soft reset, 4-1 mnemonics key, G-1 to G-8 overview, 2-7, 4-45 © National Instruments Corporation Index-11 VME-MXI-2 User Manual Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Page 259 VMEbus Interrupt Acknowledge Register 3 VME-MXI-2 Control Register (VMCR), (VIAR3), 4-40 4-28 to 4-30 VMEbus Interrupt Acknowledge Register 4 VME-MXI-2 front panel, C-1 to C-5. (VIAR4), 4-41 See also VME-MXI-2 VXIplug&play soft VMEbus Interrupt Acknowledge Register 5 front panel. (VIAR5), 4-42...
Page 260 6-2 to 6-3 (VSIDR), 4-37 VMEbus settings VME-MXI-2 Control Register arbiter timeout, 6-9 (VMCR), 4-28 to 4-30 arbiter type, 6-8 VME-MXI-2 Logical Address Register auto retry, 6-10 (VLAR), 4-32 bus timeout, 6-8 VME-MXI-2 Status Register (VMSR), fair requester, 6-9 4-25 to 4-27...
Page 261 Index write posting, A16 and A24/A32, 6-4 to 6-5 XFERR bit, 4-78 VME-MXI-2 User Manual Index-14 © National Instruments Corporation Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
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National Instruments VME-MXI-2 User Manual

Chapter 4 Register Descriptions

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