Table 15.4. Smbus Status Decoding - Silicon Laboratories C8051F330 Manual

Mixed-signal isp flash mcu
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Table 15.4. SMBus Status Decoding

Values Read
Current SMbus State
1110
0
0
X A master START was generated.
A master data or address byte
0
0
0
was transmitted; NACK received.
1100
A master data or address byte
0
0
1
was transmitted; ACK received.
A master data byte was received;
1000
1
0
X
ACK requested.
C8051F330/1/2/3/4/5
Typical Response Options
Load slave address + R/W
into SMB0DAT.
Set STA to restart transfer.
Abort transfer.
Load next data byte into
SMB0DAT.
End transfer with STOP.
End transfer with STOP and
start another transfer.
Send repeated START.
Switch to Master Receiver
Mode (clear SI without writ-
ing new data to SMB0DAT).
Acknowledge received byte;
Read SMB0DAT.
Send NACK to indicate last
byte, and send STOP.
Send NACK to indicate last
byte, and send STOP fol-
lowed by START.
Send ACK followed by
repeated START.
Send NACK to indicate last
byte, and send repeated
START.
Send ACK and switch to
Master Transmitter Mode
(write to SMB0DAT before
clearing SI).
Send NACK and switch to
Master Transmitter Mode
(write to SMB0DAT before
clearing SI).
Rev. 1.7
Values
Written
0
0
X
1
0
X
0
1
X
0
0
X
0
1
X
1
1
X
1
0
X
0
0
X
0
0
1
0
1
0
1
1
0
1
0
1
1
0
0
0
0
1
0
0
0
151

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