Silicon Laboratories C8051F330 Manual page 130

C8051F330/1/2/3/4/5
R/W R/W
P0.7 P0.6
Bit7 Bit6
Bits7–0: P0.[7:0]
Write - Output appears on I/O pins per Crossbar Registers.
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P0MDOUT.n bit = 0).
Read - Always reads '0' if selected as analog input in register P0MDIN. Directly reads Port
pin when configured as digital input.
0: P0.n pin is logic low.
1: P0.n pin is logic high.
SFR Definition 14.4. P0MDIN: Port0 Input Mode
R/W R/W
Bit7 Bit6
Bits7–0: Analog Input Configuration Bits for P0.7–P0.0 (respectively).
Port pins configured as analog inputs have their weak pullup, digital driver, and digital
receiver disabled.
0: Corresponding P0.n pin is configured as an analog input.
1: Corresponding P0.n pin is not configured as an analog input.
130
SFR Definition 14.3. P0: Port0
R/W R/W R/W
P0.5 P0.4 P0.3
Bit5 Bit4 Bit3
R/W R/W R/W
Bit5 Bit4 Bit3
Rev. 1.7
R/W R/W R/W
P0.2 P0.1 P0.0
Bit2 Bit1 Bit0
(bit addressable)
R/W R/W R/W
Bit2 Bit1 Bit0
Reset Value
11111111
SFR Address:
0x80
Reset Value
11111111
SFR Address:
0xF1