UG-600
Component No.
Mnemonic
J31
MICBIAS-CH1
J33
IOVDD Current
J34
128fs Mode
J35
Coaxial Output
J36/J40
Input 3 Select
J28
CH3 Input
J39
Input Short
J41
MICBIAS-CH1
J42
DVDD
J43
MCLKIN
J44
PLL Filter
J45
PLL Filter
J46/J49
Input 4 Select
J48
Input Short
J50
MCLKIN
J51
MICBIAS-CH1
J52
MCLK Input
J53
FREQ Select
JP1
AUX IN
JP2
CH1 IN
JP3
CH2 IN
JP4
Reset SPDIF Tx
JP5
CH3 IN
JP6
SA Mode
JP7
CH4 IN
JP8
RESET
JP9
MCLKIN
JP10
Reserved
JP11
Oscillator Enable
Description
Selects the internal or external micbias for Channel 2.
Connector for measuring IOVDD current.
Selects the 96 k sample rate for the SPDIF transmitter.
Connector for SPDIF coaxial output.
Selects the input source for Channel 3
Connector for Channel 3 input.
This jumper is used to short the ± Channel 3 input.
Selects the internal or external micbias Channel 3.
External DVDD current measurement.
Selects the external master clock input to the ADAU1977.
Selects the PLL filter for LRCLK mode.
Selects the PLL filter for MCLK mode.
Selects the input source for Channel 4.
This jumper is used to short the ± Channel 4 Input.
Selects the source for MCLKIN between oscillator, header, and Subminiature Version A,
SMA.
Selects the internal or external micbias Channel 4.
SMA connector for external master clock input.
Selects the switching frequency for the 3.3 V regulator.
Header for external auxiliary input
Header for external Channel 1 input.
Header for external Channel 2 input.
SPDIF Tx reset.
Header for external Channel 3 input.
This jumper is used for standalone mode.
Header for external Channel 4 input.
Header for the
ADAU1977
reset.
Header for master clock input.
Reserved for internal use.
Enables the oscillator.
Rev. 0 | Page 4 of 27
Evaluation Board User Guide
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