Silicon Laboratories UDP C8051F960/Si1020 User Manual page 25

A
PPENDIX
Table 4. UDP C8051F960/Si1020 MCU Card with EMIF H1 Pin Descriptions (J1)
MCU Card
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Downloaded from Elcodis.com electronic components distributor
—MCU C H
ARD EADER
Signal Name
GND
USART_TX_A
USART_RX_A
USART_RTS_A
USART_CTS_A
USART_UCLK_A
CAN_TX_B
CAN_RX_B
SPI_SCK_A
SPI_MISO_A
SPI_MOSI_A
SPI_NSS0_A
SPI_NSS1_A
SPI_NSS2_A
SPI_NSS3_A
USART_TX_B
USART_RX_B
USART_RTS_B
USART_CTS_B
USART_UCLK_B
EPCA_ECI_A
EPCA_CH0_A
EPCA_CH1_A
EPCA_CH2_A
EPCA_CH3_A
EPCA_CH4_A
EPCA_CH5_A
LIN_TX_A
LIN_RX_A
PCA_ECI_A
PCA_CH0_A
PCA_CH1_A
PCA_ECI_B
PCA_CH0_B
UPMP-F960-EMIF
P D
IN ESCRIPTIONS
Usage
Graphical LCD I/O Card SPI clock
Graphical LCD I/O Card SPI master-in, slave-out
Graphical LCD I/O Card SPI master-out, slave-in
Graphical LCD I/O Card SPI slave select
Graphical LCD I/O Card A0 address signal
Graphical LCD I/O Card Piezo
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