Silicon Laboratories UDP C8051F960/Si1020 User Manual page 32

UPMP-F960-EMIF
Table 6. UDP C8051F960/Si1020 MCU Card with EMIF H3 Pin Descriptions (J3)
MCU Card
Pin
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
32
Downloaded from Elcodis.com electronic components distributor
Description
EBID_NSS
C2_CLK_A
C2_DAT_A
C2_CLK_B
C2_DAT_B
C2_CLK_C
C2_DAT_C
C2_CLK_D
C2_DAT_D
C2_CLK_E
C2_DAT_E
nc
GND
JTAG_TDO_A
JTAG_TDI_A
VCP_EN Active-low enable for MCU Card VCP Bridge (default)
UART_SYS_EN
H3_55
H3_56
H3_57
H3_58
H3_59
H3_60
H3_61
H3_62
H3_63
H3_64
H3_65
H3_66
H3_67
H3_68
H3_69
H3_70
H3_71
H3_72
H3_73
H3_74
Description
RF EBID SPI slave select
Reset/C2 interface clock
P7.0/C2 interface data
Active-low enable for MCU to UDP UART path
Rev. 0.1