Texas Instruments SimpleLink CC3135MOD Manual page 16

CC3135MOD
SWRS225B – FEBRUARY 2019 – REVISED MARCH 2020
4.4 Connections for Unused Pins
All unused pins must be left as no connect (NC) pins.
FUNCTION
DIO
No Connect
SOP
Reset
16 Terminal Configuration and Functions
Table 4-3. Connections for Unused Pins
SIGNAL DESCRIPTION
Digital input or output
NC
Configuration sense-on-power
RESET input for the device
Submit Documentation Feedback
Product Folder Links:
Table 4-3 provides a list of NC pins.
PIN NUMBER ACCEPTABLE PRACTICE
Wake up I/O source should not be floating
during hibernate. All the I/O pins will float
3, 9, 10, 12, 18, while in Hibernate and Reset states. Ensure
19, 22, 42, 53, 54 pullup and pulldown resistors are available on
board to maintain the state of the I/O. Leave
unused GPIOs as NC
20, 21, 33, 39,
Unused pin, leave as NC.
41, 45
Leave as NC (Modules contain internal 100
kΩ pull down resistors on the SOP lines). An
23, 24, 34
external 10 kΩ pull up resistor is required for
factory restore. See
There is an internal 100 kΩ pull-up resistor
option from the nRESET pin to
VBAT_RESET. Note: VBAT_RESET is not
connected to VBAT1 or VBAT2 within the
module. The following connection schemes
are recommended:
• Connect nRESET to a GPIO from the
host only if nRESET will be in a defined
35, 36 state under all operating conditions.
Leave VBAT_RESET unconnected to
save power.
• If nRESET cannot be in a defined state
under all operating conditions, connect
VBAT_RESET to the main module power
supply (VBAT1 and VBAT2). Due to the
internal pull-up resistor, a leakage current
of 3.3 V / 100 kΩ is expected.
Copyright © 2019–2020, Texas Instruments Incorporated
CC3135MOD
www.ti.com
Section 6.5.