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PIN
DEFAULT FUNCTION
HOSTLESS
1
GND
2
GND
3
DIO10
4
nHIB
5
HOST_SPI_CLK
6
HOST_SPI_MOSI
7
HOST_SPI_MISO
8
HOST_SPI_nCS
9
DIO12
10
DIO13
11
HOST_INTR
12
DIO23
13
FLASH _SPI_MISO
14
FLASH _SPI_CS
15
FLASH_SPI_CLK
16
GND
17
FLASH_SPI_MOSI
18
DIO24
19
DIO28
20
NC
21
Reserved
22
DIO29
23
SOP2
24
SOP1
25
GND
Copyright © 2019–2020, Texas Instruments Incorporated
Table 4-1. Pin Description and Attributes
DIGITAL I/O
BLE COEX
CC_COEX_
CC_COEX_
MODE
OUT
IN
N/A
N/A
N/A
N/A
N/A
N/A
Y
Y
Y
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Y
Y
Y
Y
Y
Y
-
-
-
Y
Y
Y
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Y
Y
Y
Y
Y
Y
N/A
N/A
N/A
-
-
-
Y
Y
Y
(2)
Y
Y
-
N/A
N/A
N/A
N/A
N/A
N/A
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STATE AT
CC3135 DEVICE PIN
(1)
RESET AND
I/O TYPE
NO.
HIBERNATE
–
Power
–
Power
–
I/O
Hi-Z
I
Hi-Z
I
Hi-Z
I
Hi-Z
O
Hi-Z
I
–
O
–
–
Hi-Z
O
Hi-Z
Hi-Z
I
Hi-Z
O
Hi-Z
O
–
Power
Hi-Z
O
Hi-Z
–
–
–
–
Hi-Z
–
Hi-Z
Hi-Z
O
Hi-Z
–
–
Power
CC3135MOD
SWRS225B – FEBRUARY 2019 – REVISED MARCH 2020
DESCRIPTION
-
GND
-
GND
1
Digital input or output
Hibernate signal input to the NWP subsystem
(active low). This is connected to the MCU GPIO.
2
If the GPIO from the MCU can float while the MCU
enters low power, consider adding a pullup resistor
on the board to avoid floating.
5
Host interface SPI clock
6
Host interface SPI data input
7
Host interface SPI data output
8
Host interface SPI chip select (active low)
3
Digital input or output
4
Digital input or output
15
Interrupt output (active high)
16
Digital input or output
-
External Serial Flash Programming: SPI data in
External Serial Flash Programming: SPI chip select
-
(active low)
-
External Serial Flash Programming: SPI clock
-
Ground
-
External Serial Flash Programming: SPI data out
17
Digital input or output
18
Digital input or output
-
No Connect
-
No Connect
20
Digital input or output
A 100 kΩ pull down resistor is internally tied to this
21
SOP pin.
A 100 kΩ pull down resistor is internally tied to this
34
SOP pin. SOP[2:0] used for factory restore. See
Section
6.5.
-
GND
Terminal Configuration and Functions
CC3135MOD
11
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