Frequently Asked Questions - Cypress CYW9P62S1-43012EVB-01 Manual

3.5

Frequently Asked Questions

1. How does CYW9P62S1-43012EVB-01 handle a voltage connection when multiple power
sources are plugged in?
There are three different options to power the baseboard; KitProg3 Micro-B USB connector (J6),
PSoC 6 Micro-B USB connector (J7), and External DC supply via VIN connector (J5). The
voltage from each of the sources in passed through ORing diodes that supply VCC_IN.
2. What are the input voltage tolerances? Is there any overvoltage protection on this kit?
Input voltage levels are as follows:
Table 3-3. Input voltage levels
Supply
USB Micro-B connector (J6, J7)
VIN connector (J5)
There is no overvoltage protection on this kit.
3. I am unable to program the target device.
a. Check J15 to ensure that jumper shunt is placed.
b. Make sure that no external devices are connected to the external programming header J11.
c. Update your KitProg3 version to the latest one using the steps mentioned in the
Guide.
4. What additional overlays can be used with the CapSense?
Any kind of overlays (up to 5-mm thickness) like wood, acrylic, and glass can be used with
CapSense. Note that additional tuning may be required when the overlay is changed.
5. Can I power the kit using external program/debug headers J11 and J12?
No, this is not possible by default in this board. The target MCU is powered by on-board
regulators only and hence one of the 3 main sources (J5, J6 and J7) must be present.
There is a protection circuit that prevents reverse voltage from VTARG_REF to VTARG. Hence
the board can't be powered through J11 and J12. However this can be by-passed by loading
R130.
Note: This modification is not recommended as the target MCU will have no protection and will
be permanently damaged if 5V is supplied.
Figure 3-19. VTARG Reverse Voltage Protection
VTARG Reverse Voltage Protection
VTARG
2
BCM857BV,115
Q2A
R87
10K
Note: VTARG_REF is only output voltage sense line
for external debuggers. PSoC 6 can't be powered
using external debugging headers J11 and J12
Note: If R130 is loaded and external power is used,
make sure to remove 0 ohm R82 to
prevent reverse voltage to on-board regulator
CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28722 Rev. *B
Typical I/P Voltage
VTARG_REF
R130 0 OHM
No Load
Q1 DMP2104LP-7
5
BCM857BV,115
Q2B
R47 R86
137K 10K
1%
Absolute max
4.5 V to 5.5 V
7 V to 12 V
Hardware
5.5 V
18 V
KitProg3 User
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