Cypress CYW9P62S1-43012EVB-01 Manual page 35

3.2.5.2 Voltage Selection
VCC_VBAT has a dedicated regulator that changes voltage by varying the feedback voltage through
the resistor network at J9.
VTARG and VCC_VDDIO2_IN have dedicated 3-pin voltage selection headers J14 and J16
respectively that select between VCC_3V3 or VCC_1V8 voltages.
of the power selection circuits.
Note: In this kit, CYW43012 only works with VCC_VDDIO2_IN at VCC_1V8 configuration and
hence by default, R84 is loaded and J16 is not loaded. Similarly, PSoC 6 MCU only works with
VTARG at VCC_1V8 configuration and hence R82 is loaded and J14 is not loaded.
Figure 3-7. Voltage Selection Headers
VTARG Voltage Selection Header
VCC_1V8
R82
1.8V
3.3V
3.6V 1A
C74 R69
47pF 40.2K
50V 1%
R171 0 OHM
No Load
J9
1
2
3
R172 0 OHM
No Load
VCC_VDDIO0 voltage can be selected between VCC_3V3 and VCC_1V8 using zero-ohm resistors.
In this kit it is connected to VCC_1V8 as Quad SPI Flash (powered by VCC_VDDIO0) only works as
1.8V. Please do not change VCC_VDDIO0 to VCC_3V3 in this kit.
of the voltage selection circuits.
Figure 3-8. Voltage Selection
VDDIO0 Voltage Selection
VCC_3V3
R44
No Load
CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28722 Rev. *B
VTARG
0 OHM R83 0 OHM
No Load
J14
No Load
VCC_VBAT
R73
27.4K
1%
R72 100K
1%
VCC_VDDIO0 VCC_1V8
0 OHM R45 0 OHM
VCC_VDDIO2_IN
Voltage Selection Header
VCC_1V8 VCC_VDDIO2_IN
VCC_3V3
R84 0 OHM
1.8V
3.3V
J16
No Load
Hardware
Figure 3-7 shows the schematics
VCC_3V3
R85 0 OHM
No Load
Figure 3-8 shows the schematics
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