JVC TH-A10 Service Manual page 50

TH-A10
3.Function
Symbol
Pin NO.
1 HDD15
2 HDD0
3 HDD14
4 5VDD
5 HDD1
6 HDD13
7 HDD2
8 VSS
9 HDD12
10 VDD
11 HDD3
12 HDD11
13 HDD4
14 HDD10
15 5VDD
16 HDD5
17 HDD9
18 VSS
19 HDD6
20 HDD8
21 HDD7
22 5VDD
23 NRESET
24 MASTER
25 NINT0
26 NINT1
27 WAITODC
28 NMRST
29 DASPST
30 VDD
31 OSCO2
32 OSCI2
33 UATASEL
34 VSS
35 PVSSDRAM
36 PVDODRAM
37 CPUADR17
38 CPUADR18
39 VSS
40 CPUADR15
41 CPUADR14
42 CPUADR13
43 CPUADR12
44 VDD
45 CPUADR11
46 CPUADR10
47 CPUADR9
1-50
I/O
Function
I/O ATAPI data
I/O ATAPI data
I/O ATAPI data
I/O ATAPI data
I/O ATAPI data
I/O ATAPI data
I/O ATAPI data
I/O ATAPI data
I/O ATAPI data
I/O ATAPI data
I/O ATAPI data
I/O ATAPI data
I/O ATAPI data
I/O ATAPI data
I/O ATAPI data
I/O ATAPI data
I ATAPI reset
I/O ATAPI master / slave selection
O System control interruption 0
O System control interruption 1
O System control weight control
O System control reset
I DASP signal initializing
I,O VSS connection,OPEN
I,O VSS connection, OPEN
I VSS connection
I System control address
I System control address
I System control address
I System control address
I System control address
I System control address
System control address
I System control address
I System control address
I System control address
I/O
Symbol
Pin NO.
I
48 CPUADR8
49 CPUADR7 I
I
50 CPUADR6
51 CPUADR5 I
I
52 CPUADR4
I
53 CPUADR3
54 CPUADR2 I
I
55 CPUADR1
56 VSS
57 CPUADR0 I
I
58 NCS
I
59 NWR
60 NRD I
61 VDD
62 CPUDT7
63 CPUDT6
O
64 PVPPDRAM
I
65 PTESTDRAM
66 OVDDDRAM
67 PVSSDRAM
68 CPUDT5
69 CPUDT4
70 CPUDT3
71 VSS
72 CPUDT2
I/O
73 CPUDT1
I/O
74 CPUDT0
75 CLKOUT1 O
-
76 VDD
O
77 TEHLD
78 DTRO O
O
79 IDGT
80 BDO I
81 CPDET2 I
I
82 CPDET1
83 VSS
84 MMOD I
I
85 NRST
-
86 VDD
87 CLKOUT2 O
O
88 PLLOK
O
89 IDOHOLD
90 JMPINH O
MN103007BGA(1/2)
Function
System control address
System control address
System control address
System control address
System control address
System control address
System control address
System control address
GND
System control address
System control chip selection
System control wright
System control lead
Apply 3V
System control data
System control data
C=10000PF is connected
between VSS
VSS connected
System control data
System control data
System control data
GND
System control data
System control data
System control data
16.9/11.2/8.45MHz clock
Apply 3V
Mirror gate
Data part frequency control
switch
Part CAPA switch
RF dropout / BCA data of
making to binary
Outer side CAPA detection
Side of surroundings on inside
GND
VSS connected
System reset
Apply 3V
16.9MHz clock
Frame mark detection
ID gate for tracking holding
Jump prohibition