JVC TH-A10 Service Manual page 42

TH-A10
MN67705EA (IC201) : Digital servo controller
1.Terminal layout
TRAYSET1
TRAYSET2
TRAY-CLOSE
TRAY-OPEN
TBAL(PWMDA1)
GBAL(PWMDA2)
BDOLVL(PWMDA3)
OFTLVL(PWMDA4)
2.Block diagram
The signal of the error
of the servo input
from FEP.
Driver
ODC
1-42
FGC 1
LDONA 2
LDONB 3
PULIN 4
SRF 5
DVSS 6
7
8
DRVMUTE 9
DVDD 10
TRVSW 11
12
13
ST/SP 14
MN67705
HFMON 15
BRK 16
DVSS 17
PLLOK 18
N.C. 19
20
21
22
23
N.C. 24
N.C. 25
N.C. 26
DVSS 27
DVDD 28
TSTSG 29
FUPDN 30
MONA 31
MONB 32
A/Dconverter
Track crossing
counter
Phese
comparison
Line speed
detection
Detection at
FG cycle
CIRC core
Focus servo
Tracking servo
Traverse servo
Spindle servo
SERVO
DSP core
Serial port
CPU I/F
PLL
ADSC function block of the second generation.
CPU
96 AVSS
95 TS(AD1)
94 FS(AD2)
93 FE(AD3)
92 TROFS(AD4)
91 TE(AD5)
90 VREFLDA
89 VREFMDA
88 VREFHDA
87 TG(AD6)
86 N.C.(AD7)
85 N.C.(AD8)
84 RFENV(AD9)
83 VREFOP
82 LDCUR(AD10)
81 JITOUT(AD11)
80 VREFC
79 AVDD(AD12)
78 VREFHAD
77 VREFMAD
76 VREFLAD
75 AVSS
74 DVDD
73 DVSS
72 TX
71 MOND
70 IPFLAG
69 CIRCIRQ
68 N.C.
67 N.C.
66 N.C
65 DVSS
A/D converter
Focus tracking
(Analog control)
driving value output
Spindre / traverse
PWM
driving value output
Standard
clock C r y s t a l
generation 33.8MHz
PLL
FEP I/F
FEP
PLL