NEC 78K0S/KU1+ User Manual page 320

Function Details of
Function
Flash Self
memory programming
function
FLPMC: Flash
programming
mode control
register
320
APPENDIX D LIST OF CAUTIONS
Self programming processing must be included in the program before performing
self programming.
No instructions can be executed while a self programming command is being
executed. Therefore, clear and restart the watchdog timer counter in advance so
that the watchdog timer does not overflow during self programming. Refer to
Table 16-11 for the time taken for the execution of self programming.
Interrupts that occur during self programming can be acknowledged after self
programming mode ends. To avoid this operation, disable interrupt servicing (by
setting MK0 to FFH, and executing the DI instruction) before a mode is shifted
from the normal mode to the self programming mode with a specific sequence.
RAM is not used while a self programming command is being executed.
If the supply voltage drops or the reset signal is input while the flash memory is
being written or erased, writing/erasing is not guaranteed.
The value of the blank data set during block erasure is FFH.
Set the CPU clock so that it is 1 MHz or more during self programming.
Execute the NOP and HALT instructions immediately after executing a specific
sequence to set self-programming mode, then execute self programming. At this
time, the HALT instruction is automatically released after 10
clocks (f ).
CPU
If the clock of the oscillator or an external clock is selected as the system clock,
execute the NOP and HALT instructions immediately after executing a specific
sequence to set self-programming mode, wait for 8
status, and then execute self programming.
Check FPRERR using a 1-bit memory manipulation instruction.
The state of the pins in self programming mode is the same as that in HALT
mode.
Since the security function set via on-board/off-board programming is disabled in
self programming mode, the self programming command can be executed
regardless of the security function setting. To disable write or erase processing
during self programming, set the protect byte.
Be sure to clear bits 4 to 7 of flash address pointer H (FLAPH) and flash address
pointer H compare register (FLAPHC) to 0 before executing the self programming
command. If the value of these bits is 1 when executing the self programming
command, there is a possibility that device does not operate normally.
Clear the value of the FLCMD register to 00H immediately before setting self-
programming mode and normal operation mode.
Cautions in the case of setting the self programming mode, refer to 16.8.2
Cautions on self programming function.
Set the CPU clock so that it is 1 MHz or more during self programming.
Execute the NOP and HALT instructions immediately after executing a specific
sequence to set self-programming mode, then execute self programming. At this
time, the HALT instruction is automatically released after 10
clocks (f ).
CPU
If the clock of the oscillator or an external clock is selected as the system clock,
execute the NOP and HALT instructions immediately after executing a specific
sequence to set self-programming mode, wait for 8
status, and then execute self programming.
Clear the value of the FLCMD register to 00H immediately before setting self
programming mode and normal operation mode.
User's Manual U18172EJ2V0UD
Cautions
µ
s (MAX.) + 2 CPU
µ
s after releasing the HALT
µ
s (MAX.) + 2 CPU
µ
s after releasing the HALT
(13/15)
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