NEC 78K0S/KU1+ User Manual page 287

AC Characteristics
Basic operation (T
Parameter
Cycle time (minimum
instruction execution time)
TI000 input high-level width,
low-level width
Interrupt input high-level
width, low-level width
RESET input low-level
width
Notes 1. Use this product in a voltage range of 2.2 to 5.5 V because the detection voltage (V
clear (POC) circuit is 2.1 V ±0.1 V.
2. Selection of f
register 00 (PRM00). Note that when selecting the TI000 valid edge as the count clock, f
<R> CPU Clock Frequency, Peripheral Clock Frequency
Parameter
Ceramic resonator,
crystal resonator,
external clock
High-speed internal
oscillator
Note Use this product in a voltage range of 2.2 to 5.5 V because the detection voltage (V
(POC) circuit is 2.1 V ±0.1 V.
CHAPTER 19 ELECTRICAL SPECIFICATIONS
= −40 to +85°C, V
= 2.0 to 5.5 V
A DD
Symbol
T Crystal/ceramic oscillation
CY
clock, external clock input
High-speed internal
oscillation clock
4.0 V ≤ V
t ,
TIH DD
t
TIL
2.0 V ≤ V
DD
t ,
INTH
t
INTL
t
RSL
= f , f /4, or f /256 is possible using bits 0 and 1 (PRM000, PRM001) of prescaler mode
sam XP XP XP
Conditions
125 kHz ≤ f
4.0 to 5.5 V
125 kHz ≤ f
3.0 to 4.0 V
125 kHz ≤ f
2.7 to 3.0 V
125 kHz ≤ f
Note
2.0 to 2.7 V
500 kHz (TYP.) ≤ f
4.0 to 5.5 V
500 kHz (TYP.) ≤ f
2.7 to 4.0 V
500 kHz (TYP.) ≤ f
Note
2.0 to 2.7 V
User's Manual U18172EJ2V0UD
Note 1
, V = 0 V)
SS
Conditions
4.0 V ≤ V ≤ 5.5 V
DD
3.0 V ≤ V
< 4.0 V
DD
2.7 V ≤ V
< 3.0 V
DD
2.0 V ≤ V
< 2.7 V
DD
4.0 V ≤ V ≤ 5.5 V
DD
2.7 V ≤ V
< 4.0 V
DD
2.0 V ≤ V
< 2.7 V
DD
≤ 5.5 V
< 4.0 V
CPU Clock (f )
CPU
≤ 10 MHz
CPU
≤ 6 MHz
CPU
≤ 5 MHz
CPU
≤ 2 MHz
CPU
≤ 8 MHz (TYP.)
CPU
≤ 4 MHz (TYP.)
CPU
≤ 2 MHz (TYP.) 2 MHz (TYP.) ≤ f
CPU
MIN. TYP. MAX.
0.2 16
0.33 16
0.4 16
1 16
0.23 4.22
0.47 4.22
0.95 4.22
2/f +
sam
Note 2
0.1
2/f +
sam
Note 2
0.2
1
2
) of the power-on
POC
= f .
sam XP
Peripheral Clock (f )
XP
500 kHz ≤ f ≤ 10 MHz
XP
500 kHz ≤ f ≤ 5 MHz
XP
2 MHz (TYP.) ≤ f ≤ 8 MHz (TYP.)
XP
≤ 4 MHz (TYP.)
XP
) of the power-on-clear
POC
Unit
µ
s
µ
s
µ
s
µ
s
µ
s
µ
s
µ
s
µ
s
µ
s
µ
s
µ
s
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