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VIPA SSM-BG41 Manual

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Manual
SSM-BG41/BG42/
BG43
Order-No.: VIPA SSM-HB29E
Rev. 99/49
Subject to change to cater for technical progress

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Summary of Contents for VIPA SSM-BG41

  • Page 1 Manual SSM-BG41/BG42/ BG43 Order-No.: VIPA SSM-HB29E Rev. 99/49 Subject to change to cater for technical progress...
  • Page 2 Lerrzeichen...
  • Page 3 Hotline: +49 (9132) 744-114 All rights reserved ® VIPA is the registered trademark of VIPA Gesellschaft für Visualisierung und Prozeßautomatisierung mbH ® SIMATIC is the registered trademark of Siemens AG ® STEP 5 is the registered trademark of Siemens AG All other trademarks mentioned within the text are trademarks of the respective holders and are recognized as protected.
  • Page 4 In this chapter you will find instructions on how to parameterize the buidling blocks. For parameterizing you can use the VIPA data handling blocks or you can parameterize the building block via interface channel. The large part of the chapter attends to the use of building blocks with procedures e.g.

  • Page 5: Table Of Contents

    Manual BG41/BG42/BG43 Contents Contents 1 INTRODUCTION ......................1-1 1.1 Safety and handling precautions for the user ............ 1-1 1.1.1 Handling electrostatically sensitive modules ............ 1-1 1.1.2 Shipping electrostatically sensitive modules ............ 1-2 1.1.3 Tests and modifications to electrostatically sensitive modules......1-2 1.2 General ........................
  • Page 6 5.2.7 Setting the address with DIL switches S1 and S2 ...........5-8 5.2.8 Plug connectors J6, J11 and J12..............5-10 5.2.9 Voltage supply of the module .................5-12 5.3 Software installation of VIPA’s data handling blocks ........5-15 5.4 Startup response....................5-17 5.5 Error diagnosis....................5-18 5.5.1 Errors in serial communication ...............5-18...
  • Page 7 Manual BG41/BG42/BG43 Contents 6 TECHNICAL DATA ....................... 6-1 6.1 Interface building blocks..................6-1 6.2 Module ........................6-2 6.2.1 20mA current loop module ................6-2 6.2.2 20mA-/RS232C combination module ............... 6-3 6.2.3 RS232C module....................6-3 6.2.4 RS422/RS485 module ..................6-4 6.2.5 RS422P/RS485P module................. 6-4 6.2.6 CENTRONICS module..................
  • Page 8 Contents Manual BG41/BG42/BG43 Rev. 99/49...

  • Page 9: Introduction

    Introduction 1.1 Safety and handling precautions for the user 1.1.1 Handling electrostatically sensitive modules 1.1.2 Shipping electrostatically sensitive modules 1.1.3 Tests and modifications to electrostatically sensitive modules 1.2 General 1.3 Area of employment 1.4 Deliverable interface building blocks...
  • Page 11 1.1 Safety and handling precautions for the user 1.1.1 Handling electrostatically sensitive modules VIPA building blocks are equipped with highly integrated components in MOS-technology. These components are highly sensitive to excess voltage, which can for example result from electrostatic discharge.
  • Page 12 Safety and handling precautions for the user Manual BG41/BG42/BG43 1.1.2 Shipping electrostatically sensitive modules Always use the original packaging for dispatch. The prepared building blocks could additionally be wrapped with a conductive packaging. Conductive packaging is antistatic foil or metallozed plastic- film containers..

  • Page 13: General

    1.3 Area of employment The VIPA interface building block is used in PLC systems as an interface for the input and output of data. It is equipped with transmitting and receiving buffers (each with 256 bytes), which are run by the Z80 processor situated on the module.

  • Page 14: Deliverable Interface Building Blocks

    The interfaces can be adapted to certain physical modes of transmission by modules, which are inserted in the designed slots of the mother circuit board. The following VIPA modules can be presently used: •= 20mA Current Loop Module (Order No.: VIPA SSM-MD25) •= 20mA Current Loop/ RS232C Combination module...
  • Page 15 Interface modules 2.1 Principle of data transmission 2.2 Building block structure 2.2.1 Building block BG41 2.2.2 Building block BG42 2.2.3 Building block BG43 2.3 Allocation of the backplane connector 2.3.1 Backplane connector X1 2.3.2 Backplane connector X2 2.4 Block diagram of firmware 2.5 Firmware’s memory distribution...

  • Page 17: Interface Building Blocks

    Manual BG41/BG42/BG43 Interface building blocks 2 Interface building blocks 2.1 Principle of data transmission Data, which is written into the corresponding data channel from the PLC, is recorded by the building block in the appropriate transmission buffer (256 Byte) and from there is sent through the interface.

  • Page 18: Building Block Structure

    Building block structure Manual BG41/BG42/BG43 2.2 Building block structure 2.2.1 Building block BG41 The interface building block BG41 is a flat building block in double Euro-format with two 48-pole base plugs in the construction system ES 902. It has a width of 1 1/3 mounting places. The building block BG41 has 1 interface, which can be adapted to certain physical modes of transmission by means of interface modules.

  • Page 19: Fig. 2-3: Position Of Jumpers And Dil Switches On Bg41

    Manual BG41/BG42/BG43 Interface building blocks Fig. 2-3: Position of jumpers and DIL switches on BG41 Rev. 99/49...

  • Page 20: Building Block Bg42

    Building block structure Manual BG41/BG42/BG43 2.2.2 Building block BG42 The interface building block BG41 is a flat building block in double Euro- format with two 48-pole base plugs in the construction system ES 902. It has a width of 1 1/3 mounting places. The building block BG42 has 2 interfaces, which could be adapted to certain physical modes of transmission by means of interface modules.

  • Page 21: Fig. 2-5: Position Of Jumpers And Dil Switches On Bg42

    Manual BG41/BG42/BG43 Interface building blocks Fig. 2-5: Position of Jumpers and DIL switches on BG42 Rev. 99/49...

  • Page 22: Building Block Bg43

    Building block structure Manual BG41/BG42/BG43 2.2.3 Building block BG43 The building block module BG41 is a flat building block in double Euro-format with two 48-pole base plugs in the construction system ES 902. It has a width of 1 1/3 mounting places. The building block BG42 has 3 interfaces, which could be adapted to certain physical modes of transmission by means of interface modules.

  • Page 23: Fig. 2-7: Position Of Jumpers And Dil Switches On Bg43

    Manual BG41/BG42/BG43 Interface building blocks Fig. 2-7: Position of jumpers and DIL switches on BG43 Rev. 99/49...

  • Page 24: Allocation Of The Backplane Connector

    Allocation of the backplane connector Manual BG41/BG42/BG43 2.3 Allocation of the backplane connector 2.3.1 Backplane connector X1 n.c. UBAT PESP n.c. ADB12 ADB00 /CPKL ADB13 ADB01 /MEMR ADB14 ADB02 /MEMW ADB15 ADB03 /RDY n.c. ADB04 n.c. ADB05 n.c. ADB06 n.c. ADB07 n.c.

  • Page 25: Block Diagram Of Firmware

    Manual BG41/BG42/BG43 Interface building blocks 2.4 Block diagram of firmware Fig. 2-8: Firmware block diagram BG43 2.5 Firmware’s memory distribution The Z80 processor on communication processors has an address range of 64 KByte. This is distributed as follows: 0000 Firmware-EPROM (32 KByte) 7FFF 8000 RAM (32 KByte)
  • Page 26 Firmware’s memory distribution Manual BG41/BG42/BG43 2-10 Rev. 99/49...

  • Page 27: General

    Interface module 3.1 General 3.1.1 Voltage supply 5V and 24V 3.1.2 LED indicators on the modules 3.1.3 Selection table: function - module - function blocks 3.2 Functional description and allocation of terminal pins 3.2.1 20mA current loop-modul (MD25) 3.2.2 RS232C module (MD22) 3.2.3 20mA current loop/RS232C combination module (MD26) 3-12 3.2.4 RS422/RS485 module (MD21)
  • Page 29 Manual BG41/BG42/BG43 Interface modules 3 Interface modules 3.1 General The modular communication processor SSM is an intelligent carrier module, upon which a series of input, output and communication modules can be equipped. Depending on the module, up to 3 interface modules can be optionally combined. The communication processor SSM is suitable for: •= Communication with automation equipment and computers •= Connection with keyboards, terminals or printers...

  • Page 30: Tab. 3-1: Led-Indicators On The Modules

    General Manual BG41/BG42/BG43 3.1.2 LED indicators on the modules The interface modules are equipped with LEDs. It is possible to determine the type of module or inserted building block being used on the interface by the colour of the LED. In this chapter the significance of the LED indicators are described in connection with the respective modules.

  • Page 31: Tab. 4-1: Selection Table: Function - Module - Function Blocks

    Manual BG41/BG42/BG43 Interface modules 3.1.3 Selection table: function - module - function blocks Functions Required or possible Initialization Cycle module (OB20, OB21, OB22) (OB1) Serial functions No procedure MD21, MD22, MD25, MD26, FB100, FB101, FB5, FB3, FB4 MD33, MD34 FB15 STX/ETX procedure MD21, MD22, MD25, MD26, FB100, FB101, FB5,...

  • Page 32: Fig. 3-1: Structure Of The 20Ma Current Loop-Moduls

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2 Functional description and allocation of terminal pins 3.2.1 20mA current loop-modul (MD25) 3.2.1.1 General The RS232C interface can no longer be sufficiently relied upon in an environment where high interference levels are expected. The 20mA current loop interface was therefore developed. With this interface a logical "1"...

  • Page 33: Fig. 3-2: Allocation Of Terminal Pins When Operating 20Ma Current Loop Modules

    Manual BG41/BG42/BG43 Interface modules 3.2.1.2 Allocation of the 20mA current loop module’s terminal pins Fig. 3-2: Allocation of terminal pins when operating 20mA current loop modules If the 20mA current loop interface module or the combination module are used as a 20mA current loop module, the interface can be operated as a passive or active part of the transmission link.

  • Page 34: Fig. 3-3: Characteristic Curves Of The Current Sources In Relation To The Applied Voltage

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.1.3 Voltage supply for a 20mA current loop If the 20mA current loop module or the 20mA current loop combination module are operated as the active part of a current loop, they can be supplied internally or externally from the 20mA current sources found on the module: •= internally through the back plane bus (base plug X1 or X2) •= externally through the 25-pole SubD socket...

  • Page 35: Fig. 3-4: An Active 20Ma Current Loop Interface

    Manual BG41/BG42/BG43 Interface modules 3.2.1.4 An active 20mA current loop interface The serial interface functions as the active part of the transmission link, the peripheral device as the passive part. Fig. 3-4: An active 20mA current loop interface Observe shielding! See construction guidelines in chapter 5! The jumpers J6 on the mother board and X3 and X5 on the module enable the current sources for the 20mA current loop to be supplied with 24 V from the back plane bus.

  • Page 36: Fig. 3-5: A Passive 20Ma Current Loop Interface

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.1.5 A passive 20mA current loop interface Peripheral equipment (e.g. the printer PT 88), as the active part, are in the position to take over the supply of the 20mA-connection. In this manner, the serial interface can be operated as the passive part.

  • Page 37: Fig. 3-6: The Structure Of The Rs232C Modules

    Manual BG41/BG42/BG43 Interface modules 3.2.2 RS232C module (MD22) The RS232C is defined for data transmission for a maximum of 15m up to 38,4baud. The communication occurs by data, signal and control lines . The RS232C module serves the point-to-point connection on the basis of the RS232C standards. No presetting has to be observed when operating the RS232C interface module.

  • Page 38: Fig. 3-8: Rs232C Interface : Connection With A Rts/Cts Handshake

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.2.2 Connection with a RTS/CTS handshake It is possible to establish a connection through the RS232C interface with or without a handshake. When operating an RS232C interface, a hardware handshake is used through the signals RTS and CTS.

  • Page 39: Fig. 3-9: Rs232C Interface: Connection Without A Handshake

    3.2.2.3 Connection without a handshake If the peripheral equipment does not have a handshake signal at its disposal, it is possible to operate without a hardware handshake. In this case according to VIPA, the RTS/CTS should always be bridged! With this type of connection it must be insured, that no character is lost. This can be achieved by observing the following points: •= a low baud rate or a quick recording of characters by the peripheral equipment...

  • Page 40: Fig. 3-10: Structure Of A 20Ma Current Loop/Rs232C Combination Module

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.3 20mA current loop/RS232C combination module (MD26) 3.2.3.1 General The combination module serves as a point-to-point or a bus connection and has two line current loops for transmission and reception at its disposal. In a bus operation the module, in a voltage-free state, connects all loops in order to prevent the entire system from being impaired.

  • Page 41: Fig. 3-11: Allocation Of Terminal Pins When Using A 20Ma Current Loop Module

    Manual BG41/BG42/BG43 Interface modules 3.2.3.2 Allocation of terminal pins when using a 20mA current loop module Details on the 20mA current loop module can be found in chapter 3.2.1. Fig. 3-11: Allocation of terminal pins when using a 20mA Current Loop Module 3.2.3.3 Allocation of terminal pins when using a RS232C-module Details on the RS232C module are to be found in chapter 3.2.2..

  • Page 42: Fig. 3-13: Structure Of The Rs422/Rs485 Module

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.4 RS422/RS485 module (MD21) 3.2.4.1 General The RS422 interface is suitable for transmission lengths of up to 1200m. In using a four-wire line, data can be simultaneously sent and received. As a result of the symmetrical transmission a higher interference immunity is achieved.

  • Page 43: Fig. 3-14: Allocation Of Terminal Pins When Using A Rs422/Rs485-Moduls

    Manual BG41/BG42/BG43 Interface modules 3.2.4.2 Allocation of the RS422/RS485 module’s terminal pins Fig. 3-14: Allocation of terminal pins when using a RS422/RS485-moduls It is possible to obtain 24 V from pin 11 (+24 V) and pin 22 (ground), if this voltage is available in the connected PLC.

  • Page 44: Fig. 3-15: Point To Point Connection With A Rs422/Rs485-Module

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.4.3 Point to point connection Fig. 3-15: Point to point connection with a RS422/RS485-module Two twisted-pair wires, which have to be particularly shielded, are to be used for the TX and RX links.

  • Page 45: Fig. 3-16: Two-Wire Connection With A Rs422/Rs485 Module

    Manual BG41/BG42/BG43 Interface modules 3.2.4.4 Two-wire connection By linking Rx+ and Tx+ or Rx- and Tx- it is possible to produce a two-wire connection. The RS485 interface uses the two-wire connection. Due to the links, the sent data is immediately recoupled. The recoupled data is to be filtered by using software.

  • Page 46: Fig. 3-17: Multidrop Connection With A Rs422/Rs485 Module

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.4.5 Multidrop connection (Multipoint connection) The multidrop connection should be selected, if several external pieces of equipment are to be connected to the interface as receivers. Fig. 3-17: Multidrop connection with a RS422/RS485 module The number of connection possibilities for external equipment depends on the type of interface.

  • Page 47: Fig. 3-18: Four-Wire Connection With A Rs422/Rs485 Module

    Manual BG41/BG42/BG43 Interface modules 3.2.4.6 Four-wire bus connection The four-wire connection should be selected, if several external pieces of equipment are to be connected to the bus. Fig. 3-18: Four-wire connection with a RS422/RS485 module The number of slave connections, depends on the type of interface: 15 slaves can be connected with RS422 or 31 slaves with RS485 Rev.

  • Page 48: Fig. 3-19: Structure Of Rs422P And Rs485P Modules

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.5 RS422P (MD33) and RS485P (MD34) module floating 3.2.5.1 General The module serves the point-to-point or the multidrop connection on the basis of the RS422/RS485 norm. The module possesses a potential separation. When operating RS422P or RS485P modules on the bus ends, a 100Ω...

  • Page 49: Fig. 3-20: Allocation Of Terminal Pins When Using Rs422P And Rs485P Modules

    Manual BG41/BG42/BG43 Interface modules 3.2.5.2 Allocation of RS422P and RS485P terminal pins Fig. 3-20: Allocation of terminal pins when using RS422P and RS485P modules 3.2.5.3 Two-wire Bus Connection By linking Rx+ and Tx+ or Rx- and Tx- it is possible to produce a two-wire bus connection. The RS485 interface uses the two-wire connection.

  • Page 50: Fig. 3-22: Structure Of The Centronics Module

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.6 CENTRONICS module (MD24) 3.2.6.1 General The module is used for controlling equipment with CENTRONICS interfaces. The module is preferably used for controlling printers. When using the CENTRONICS module, no presettings need to be observed. Fig.

  • Page 51: Fig. 3-23: Allocation Of Terminal Pins When Using A Centronics Module

    Manual BG41/BG42/BG43 Interface modules 3.2.6.2 Allocation of the CENTRONICS module’s terminal pins Fig. 3-23: Allocation of terminal pins when using a CENTRONICS module Fig. 3-24: Point-to-point connection when using a CENTRONICS module The allocation of the 25-pole SubD sockets corresponds to the allocation selected by IBM for the connection of a parallel printer in accordance with CENTRONICS.

  • Page 52: Fig. 3-25: Structure Of An Ssi Module

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.7 SSI module (MD39) 3.2.7.1 General An SSI interface is a synchronous pulsing serial interface. SSI is the abbreviation for Synchronous Serial Interface. The clock frequency is preset by the user. The SSI module enables the connection of completely coded transducers with an SSI interface.

  • Page 53: Fig. 3-26: Data Flow

    Manual BG41/BG42/BG43 Interface modules 3.2.7.2 Data flow Fig. 3-26: Data flow Rev. 99/49 3-25...

  • Page 54: Fig. 3-27: Allocation Of The Terminal Pins When Using An Ssi Module

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.7.3 Allocation of the SSI module’s terminal pins Fig. 3-27: Allocation of the terminal pins when using an SSI module Most suitable cable length The clock frequency was increased to 10 MHz with the release 4. The cable length depends on the clock frequency and the transfer rate.

  • Page 55: Fig. 3-28: Block Diagram Of An Ssi

    Manual BG41/BG42/BG43 Interface modules 3.2.7.4 Functional mode The SSI module contains two SSI receivers, which can simultaneously read into the data of two transducers. The data can be read by writing an address into the SSI module’s register area. In principle, 25 clock pulses are generated, which then read the transducer’s data into the internal shift register.

  • Page 56: Tab. 3-4: List Of Parameters For The Loading Of Fb45

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.7.6 Application of SSI modules with VIPA data handling blocks Possible data handling blocks Initialization FB100, FB101 Cycle FB45 For the application of an SSI module, it is necessary to enter the SSI application into the FB100 or the FB101.
  • Page 57 Manual BG41/BG42/BG43 Interface modules 3.2.7.8 Example The SSI module should be used with channel 1 of the building block. The building block is to be found at the address F080h. This corresponds to the peripheral address PY128. A device which provides measured values is connected to the input channel of the SSI module.
  • Page 58 Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.7.9 Application of the SSI-module without data handling blocks 3.2.7.10 Parameter channel Further information for the application of the interface without Data Handling Blocks can be found in chapter 4.2. Select the SSI function for the corresponding interface channel via the parameter channel with the command 5.
  • Page 59 Manual BG41/BG42/BG43 Interface modules Command 1 - Reading of an SSI encoder value An SSI encoder value can be read via the data channel with command 1. One has the possibility of selecting 2 SSI encoders. Encoder 1 Encoder 2 Fig.

  • Page 60: Fig. 3-31: Setting Of The Mode Ssi With Command 3

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 Command 3 - Setting the mode When setting the mode, two additional bytes are transferred as argument. Fig. 3-31: Setting of the mode SSI with command 3 Bit 3 in byte 1 is used as the control bit for the block commands. If this bit is set at 1, the command applies for all connected sonsors of the channel.

  • Page 61: Fig. 3-32: Structure Of The 5V Counter Module

    Manual BG41/BG42/BG43 Interface modules 3.2.8 Counter module (MD18,19) 3.2.8.1 General The counter module is available in the configurations 24V (MD18) and 5V (MD19). Three independant counters are to be found on the module, 2 of which can be cascaded. The counter modules in their delivery state are so adjusted, that 3 independant 16-bit counters are available.
  • Page 62 Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.8.2 Cascading of counter 1 and 2 to a 32 bit counter Counter 1 and 2 can be interconnected by the three jumpers X1, X2 and X3. The following settings are possible: Jumper X1, X2 and X3 in position 16 Standard position, both counters are operated independantly from each other.

  • Page 63: Fig. 3-33: Allocation Of Terminal Pins When Using A 5V Counter Module

    Manual BG41/BG42/BG43 Interface modules 3.2.8.4 Allocation of 5V counter’s terminal pins Fig. 3-33: Allocation of terminal pins when using a 5V counter module Description of Signals: Earth Supply voltage output Supply voltage output CYa/BWa Carry or borrow output of counters 1, 2 or 3 active: high - max.

  • Page 64: Fig. 3-34: Allocation Of Terminal Pins When Using A 24V Counter Module

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.8.5 Allocation of 24V counter’s terminal pins Fig. 3-34: Allocation of terminal pins when using a 24V counter module Description of Signals: Earth Supply voltage output Supply voltage output Supply voltage output (for external voltage supply or extraction Supply voltage output by adjustment to internal voltage supply))
  • Page 65 •= give the counter a default value •= allow the counter to operate in a certain mode The parameters can be transferred by means of VIPA data handling blocks (HTB) or directly transferred by the use of commands. Rev. 99/49...

  • Page 66: Tab. 3-5: List Of Parameters For The Loading Of Fb10

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.8.9 FB10 (LESEN), reading of the counter reading With FB10 (LESEN) the value of a particular counter can be read. The following parameters are to be transferred when loading FB10: Des. Format Explanation Building block’s abssolut base...

  • Page 67: Tab. 3-6: List Of Parameters For The Loading Of Fb11

    Manual BG41/BG42/BG43 Interface modules 3.2.8.10 FB11 (SCHREIBEN), give counter a default value With FB11 (SCHREIBEN) a certain counter can be given a default value. The following parameters are to be transferred when loading FB11: Des. Format Explanation building block’s absolute base address Number of channels Counter number...

  • Page 68: Tab. 3-7: List Of Parameters For The Loading Of Fb12

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.8.11 FB12 (MODE), mode selection for the counter Use the FB12 (MODE) for selecting the mode of the three counters of the counter module. Each counter, independent from the other counters, can be set to one of eight different modes. Load the FB12 in start OB.
  • Page 69 Manual BG41/BG42/BG43 Interface modules Counter modes Eight modes are available for the counters. Depending on which input the pulse is situated, it is counted upwards or Mode 0 downwards. The functions of the 5V counter module differ in this respect to those of the 24V counter module: 5V Counter module 24V Counter module...
  • Page 70 Functional description and allocation of terminal pins Manual BG41/BG42/BG43 Mode 6 Measurement of pulse width In this mode the impulse, whose width is to be measured, is to be positioned at input UA1. A counter frequency of 10 Mhz is used. The count direction can be determined by the UA2.
  • Page 71 Manual BG41/BG42/BG43 Interface modules #OB21 00002 :SPA FB 100 NAME #PROCW =KH F080 Base address KANR =KF +1 Channel number PROC =KF +5 Procedure counter FEHL =MB 199 Erorr byte 00010 :SPA FB 12 NAME #MODE =KH F080 Base address =KF +1 Channel number MOD1 =KF +1...
  • Page 72 Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.8.12 Application of counter modules without data handling blocks Further information for the application of the interface without Data Handling Blocks can be found in chapter 4.2. Command: 80 - Setting the counter mode With the command 80 the building block is informed, that the counter’s mode should be set.
  • Page 73 Manual BG41/BG42/BG43 Interface modules Reading the counter status Command 00 The counter module’s status is read by the interface building block from a register. In this register a counter overflow which may arise is saved upwards (carry) or downwards (borrow). Fig.
  • Page 74 Functional description and allocation of terminal pins Manual BG41/BG42/BG43 Example: All three counters should be operated with mode 1. If the mode is programmed, the momentary counter reading should be read. The following bytes are to be transferred: From the building block 6 bytes can be read through the corresponding channel, whereby the counter’s high-order byte is always in first place.

  • Page 75: Fig. 3-37: Structure Of The Analogue Input Module

    Manual BG41/BG42/BG43 Interface modules 3.2.9 Analogue input (MD40-44) and output module (MD45-49) 3.2.9.1 General The module for analogue input or analogue output enables the connection of analogue process interface equipment to the AG-115U, -135U and -155U. They convert the analogue signals with a resolution of 12 bits into a SPS-CPU digital signal and vice versa.

  • Page 76: Fig. 3-38: Data Flow Of Analogue Input Or Analogue Output Module

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.9.2 Data flow Fig. 3-38: Data flow of analogue input or analogue output module 3-48 Rev. 99/49...

  • Page 77: Fig. 3-39: Allocation Of Terminal Pins When Using An Analogue Input Module

    Manual BG41/BG42/BG43 Interface modules 3.2.9.3 Allocation of analogue module’s terminal pins Analogue input module Fig. 3-39: Allocation of terminal pins when using an analogue input module Analogue output module Fig. 3-40: Allocation of terminal pins when using an analogue output module The reserved pins are not allowed to be connected! Rev.

  • Page 78: Fig. 3-41: Block Diagram Of An Analogue Input Module

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.9.4 Functional mode Analogue input module Fig. 3-41: Block diagram of an analogue input module Analogue output module Fig. 3-42: Block diagram of an analogue output module 3-50 Rev. 99/49...

  • Page 79: Tab. 3-8: List Of Parameters Fot The Loading Of Fb50

    Manual BG41/BG42/BG43 Interface modules 3.2.9.5 Application of analogue input/output with data handling blocks Possible data handling blocks for analogue input Initialization FB50, FB51, FB54 Cycle FB52, FB55, FB56, FB57, FB58 Possible data handling blocks for analogue output Initialization FB50, FB51, FB54 Cycle FB53, FB56 3.2.9.5.1 FB50 (PROCW), procedure selection...

  • Page 80: Tab. 3-9: List Of Parameters For The Loading Of Fb51

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 Number of channels, which should be polled by the firmware. The channels must NKAN be occupied in ascending order. Valid numbers are 1-8. This parameter gives the end value of the channels to be polled. The channels 1 up to this value are always polled.
  • Page 81 Manual BG41/BG42/BG43 Interface modules Bit number 0 = 0 signed MODE 1 unsigned 1 = 0 binary representation from Wandler -2048...2047 (0...4095) 1 normalised representation in mV or mA 2 = 0 no bottom limit for current measurement 1 bottom limit 4 mA Offset to the zero point of the input/output OFFS FEHL...

  • Page 82: Tab. 3-11: List Of Parameters For The Loading Of Fb53

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.9.5.4 FB53 (ANA_OUT), giving the analogue value With this data handling block FB53 (ANA_OUT) analogue values can be given out. The following parameters are to be transferred when loading FB53: Des. Format Explanation Peripheral base address of the building...
  • Page 83 Manual BG41/BG42/BG43 Interface modules 3.2.9.5.5 FB54 (UG/OG), establishing the upper and lower levels With this data handling block FB54 (UG/OG) the lower and upper levels for one input/output or for all inputs/outputs can be given. These values are used as a scaling. The following parameters are to be transferred when loading FB54: Des.

  • Page 84: Fig. 3-43: Transformating The Analogue Range To The Scaled Range

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 Transformating the analogue range to the scaled range A sensor gives an analogue value. The firmware shows this value in the nominal range. The nominal range is hardware specific and is in the range of -2048 to 2047. You don't want to work with this values, but you want to predefine your own range, which is directy combined with the sensor values.
  • Page 85 Manual BG41/BG42/BG43 Interface modules 3.2.9.5.6 FB55 (STAT_IN), reading of the status bit The status bit can be read with the data handling block FB55 (STAT_IN). This function is presently only available with the 4-20mA module (MD43). The following parameters are to be transferred when loading FB55: Des.

  • Page 86: Tab. 3-14: List Of Parameters For The Loading Of Fb56

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.9.5.7 FB56 (MIN/MAX), determinig the min. and max. values With this data handling block FB56 (MIN/MAX) a minimum and a maximum value can be determined for one input/output or for all inputs/outputs. The following parameters are to be transferred when loading FB56: Des.
  • Page 87 Manual BG41/BG42/BG43 Interface modules 3.2.9.5.8 FB57 (IN_MW), reading of analogue value in the flag word With this data handling block FB57 (IN_MW) one or all analogue inputs can be read. The following parameters are to be transferred when loading FB57: Des.

  • Page 88: Tab. 3-16: List Of Parameters For The Loading Of Fb58

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.9.5.9 FB58 (IN_DW), reading of analogue values in the data word With this data handling block FB58 (IN_DW) one or all analogue inputs can be read. The data block is to be opened before loading the FB. The following parameters are to be transferred when loading the FB58: Des.
  • Page 89 Manual BG41/BG42/BG43 Interface modules 3.2.9.5.10 Example Start OB OB21 SPA FB50 NAME #PROCW :KF 128 Building block’s peripheral address KANR :KF 1 Channel number MODL :KF 40 Module number NKAN :KF 3 Maximum of inputs to be polled FEHL :MB127 Error code in flag byte 127 :SPA FB 59 #Timer...
  • Page 90 Functional description and allocation of terminal pins Manual BG41/BG42/BG43 Cycle OB :SPA FB 52 NAME #ANA_IN =KF +128 Base address of the SSM PY128 K/EI =KY 1,1 Module’s channel number, number of the input channel WERT =MW 20 Flag word MW20 for the analogue input value FEHL =MB 55 Error code to be filed in MB55...
  • Page 91 Manual BG41/BG42/BG43 Interface modules SPA FB 55 NAME #STAT_IN =KF +128 Base address of the SSM, PY128 K/EI =KY 1,2 Channel number / input, output number WERT =MW 30 Returning of the status bits FEHL =MB 18 Error byte If the min. or max. value falls down or up, a corresponding status bit is set. SPB FB 56 NAME #MIN/MAX...
  • Page 92 Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.9.6 Application of analogue input/output modules without data handling blocks 3.2.9.6.1 Parameter channel Further information for the application of the interface without data handling blocks can be found in chapter 4.2. Select the procedure with command 5.
  • Page 93 Manual BG41/BG42/BG43 Interface modules Command 1 - Reading the analogue value Fig. 3-45: Reading of the analogue value of the analogue input/output with command 1 The line 0 .. 7 is assigned to the inputs or outputs. The following bytes are returned as follows: Bit No.
  • Page 94 Functional description and allocation of terminal pins Manual BG41/BG42/BG43 Command 2 - Writing the analogue value Fig. 3-46: Writing the analogue value of the analogue input/output with command 2 Bit 3 is used as the control bit for block commands. If this bit is set at 1, the command applies for all lines.
  • Page 95 Manual BG41/BG42/BG43 Interface modules Command 3 - Setting of the mode When setting the mode two further bytes are transferred as an argument. Fig. 3-47: Setting of the mode for the analogue input/output with command 3 Bit 3 is used as the control bit for block commands. If this bit is set at one, this command applies to all lines.
  • Page 96 Determines the number of lines to be polled. Module Number The module number corresponds to the last numeral of the module’s order number. Example: The 10V input module has the order number VIPA SSM-MD40. Enter the module number 40dez. 3-68 Rev. 99/49...
  • Page 97 Manual BG41/BG42/BG43 Interface modules Command 5 - Scaling With scaling four extra bytes are transferred as an argument. Fig. 3-49: Scaling of an analogue input/output with command 5 Rev. 99/49 3-69...
  • Page 98 Functional description and allocation of terminal pins Manual BG41/BG42/BG43 Command 6 - Reading the status Fig. 3-50: Reading the status of the analogue input/output with command 6 The following bytes are sent back in the following way: Bit No. MIN Status Bit No.
  • Page 99 Manual BG41/BG42/BG43 Interface modules Command 7 - Writing of the MIN/MAX limits Fig. 3-51: MIN/MAX levels of the analogue input/output with command 6 Bit 3 is used as the control bit for block commands. If this bit is set at one, the command applies for all lines. Rev.

  • Page 100: Fig. 3-52: Structure Of The Temperature Module For Pt100

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.9.7 Temperature module for PT100 (MD44) 3.2.9.7.1 General The temperature module PT100 enables the connection of different types of PT100 temperature sensors with the AG-115U,-135U and-155U. The modul delivers a 16 Bit integer value proportional to the temperature sensor's resistor.

  • Page 101: Fig. 3-54: An Application Example Of The Temperature Module

    Manual BG41/BG42/BG43 Interface modules 3.2.9.7.3 Connection example Fig. 3-54: An application example of the temperature module Rev. 99/49 3-73...

  • Page 102: Fig. 3-55: Combination Dcf77 Antenna With 20Ma Current Loop Module

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.10 DCF77 antenna module (MD36) 3.2.10.1 General The Federal Institute of Physical Technology in Braunschweig operates a cesium atomic frequency standard with an arithmetical response deviation of 1 second in 1 million years. This clock time is coded (DCF77) and is irradiated from an LF transmitter in Mainflingen near Frankfurt.

  • Page 103: Fig. 3-56: Location Of Transmitter For The Dcf77 Signal

    Manual BG41/BG42/BG43 Interface modules 3.2.10.2 Transmitter’s location The transmitter which belongs to the Federal Institute for Physical Technology, Braunschweig is located in Mainflingen near Frankfurt. Like a radio, the reception is greatly dependent upon place and location. However, within a radius of 1500 km around Frankfurt it is generally possible to get a reception without any difficulties.

  • Page 104: Fig. 3-57: The Dimensions Of The Dcf77 Antenna Module

    Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.10.3 The module’s dimensions Fig. 3-57: The dimensions of the DCF77 antenna module 3-76 Rev. 99/49...

  • Page 105: Fig. 3-58: Allocation Of The Dcf77 Antenna Module's Terminal Pins

    Manual BG41/BG42/BG43 Interface modules 3.2.10.4 Allocation of DCF77 antenna module’s terminal pins Fig. 3-58: Allocation of the DCF77 antenna module’s terminal pins 3.2.10.5 The time plan The following figure shows the temporal course of transmtting the coded time information from the German time signal transmitter.
  • Page 106 Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.10.6 Transmission protocol The antenna module sends 7 bytes through the 20mA Current Loop interface. The bytes are not acknowledged. The following is, for example, transferred: 06.06.95 14:53:00 Identification Minutes 53h Hours 14h Day 06h Month 06h...

  • Page 107: Fig. 3-60: Alignment Of The Dcf77 Antenna Module

    Manual BG41/BG42/BG43 Interface modules 3.2.10.7 Alignment of the antenna As shown in Fig. 3-60 the antenna must be aligned, so that it is tangential to the transmitter. Fig. 3-60: Alignment of the DCF77 antenna module 3.2.10.8 Connection example Fig. 3-61: Connection standards for the DCF77 antenna module Rev.
  • Page 108 Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.10.9 Start-up response After being switched on or reset, both LEDs light up on the antenna module after a short transient period. By correct alignment the green LED starts to blink a pulse a second. After approximately one minute, the red light also starts to blink and hereby indicates the synchronisation phase.
  • Page 109 Manual BG41/BG42/BG43 Interface modules 3.2.10.12 Installation of an interface building block A 20mA module (SSM-MD25 or SSM-MD26) is required for operating an interface building block (from firmware 4118V12 on). The module must be separately ordered. From firmware 4118V12 and by selecting the DCF77 function, the following transmission parameters are automatically set, as long as jumper J11 is plugged into position “75 to 19200“...
  • Page 110 Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3.2.10.13 Application of the DCF77 antenna module with data handling blocks Possible data handling blocks Initialization FB100, FB101 Cycle FB102 The DCF77 antenna module consists of a DCF77 reception unit, which provides a 20mA current loop interface with the received decode time signal.

  • Page 111: Tab. 3-17:List Of Parameters For The Loading Of Fb102

    The clock situated on the interface building block can be set with the FB 102 (UHR) and sent to the automation device. It is however possible to set the time automatically with the help of a DCF77 antenna module, which is available from VIPA. For peripheral addressing please use a FB 103.
  • Page 112 Functional description and allocation of terminal pins Manual BG41/BG42/BG43 Allocation DB99 The data words of the data block DB99 are allocated as follows: DL0: building block’s aknowledgement byte DR0: Error byte no error building block wrongly addressed or defect data block not available wrong clock command DL1: clock should be addressed...

  • Page 113: Tab. 3-18: Example Fb102 (Uhr)

    Manual BG41/BG42/BG43 Interface modules The allocation of the data words from DW2 up to DW5 is only of significance for the sub-command 01h (= transfer time and date in BCD format to PLC). For the sub-command 05h (= transfer time and date in ASCII format to the PLC) the string to be transferred is filed in the data words DW2…DW11.
  • Page 114 Functional description and allocation of terminal pins Manual BG41/BG42/BG43 3-86 Rev. 99/49...

  • Page 115: Software

    Software 4.1 Handling with VIPA data handling blocks 4.1.1 Important advice 4.1.2 Overview of parameterizing possibilities 4.1.3 Changing the standard parameters 4.1.4 Selection of function 4-10 4.1.5 Data handling without a protocol and procedure 4-12 4.1.6 Data handling with procedure STX/ETX 4-18 4.1.7 Handling with procedure 3964(R)
  • Page 117 4 Software The interface building blocks can be parameterized in two ways: 1. Using the VIPA handling blocks which can be ordered by VIPA. 2. Parameterizing the interface building blocks directy over channel 0. The needed function blocks for the wanted function can be seen in Tab. 4-1.
  • Page 118 Further information on the methods of addressing can be found in chapter 5. 4.1.2 Overview of parameterizing possibilities • • • • = = = = Parameterizing with VIPA data handling blocks Changing of the standard parameter FB5, PARAMETR, Baud rate, length of signals, parity, number of stop bits with absolute addressing.
  • Page 119 Manual BG41/BG42/BG43 Software Data Handling Blocks dependant on procedures STX/ETX procedure FB40 PARA_STX, Parametrizing the STX/ETX interface FB43 SEND, Data output FB44 RECEIVE, Data received 3964(R)-procedure FB30 SYNCHRON (up to Firmware level 4.1), Select 3964R procedure FB37 SYNCHRON (from Firmware level 5.0 on), Select 3964R procedure FB28 RELEASE BUILDING BLOCK, the building block blocked out with SYNCHRON, is released again.
  • Page 120 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 4.1.3 Changing the standard parameters The interface module is automatically parametrized after the PLC has been switched on for the first time. The following standard values are set: •= Standard function (without a procedure/protocol) •= Baud rate of 9600 baud...
  • Page 121 Manual BG41/BG42/BG43 Software K= Number of channels, through which the data should be transmitted. The second byte must be 0. The channel number used is dependent upon the interface: Building block BG41 channel number Building block BG42 channel number 1, 2 Building block BG43 channel number 1, 2, 3 BAUD...
  • Page 122 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 This byte has a value of 0, if functioning correctly. In the case of a malfunction, FEHL an error code is entered. The error is acknowledged automatically, i.e. the byte is reset to 0, once the cause of the error has been eliminated.

  • Page 123: Tab. 4-3: List Of Parameters For The Loading Of Fb102

    The clock situated on the interface building block can be set with the FB 102 (UHR) and sent to the automation device. It is however possible to set the time automatically with the help of a DCF77 antenna module, which is available from VIPA. For peripheral addressing please use a FB 103.
  • Page 124 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 Allocation DB99 The data words of the data block DB99 are allocated as follows: DL0: building block’s aknowledgement byte DR0: Error byte no error building block wrongly addressed or defect data block not available...

  • Page 125: Tab. 4-4: Example Fb102 (Uhr)

    Manual BG41/BG42/BG43 Software The allocation of the data words from DW2 up to DW5 is only of significance for the sub-command 01h (= transfer time and date in BCD format to PLC) and 02h (= set clock). The data words are irrelevant for the sub-commands 03h (= set clock one hour forward) and 04h (= set clock one hour back).

  • Page 126: Tab. 4-5: List Of Parameters For The Loading Of Fb100

    Handling with VIPA data handling blocks Manual BG41/BG42/BG43 4.1.4 Selection of function 4.1.4.1 FB100 (PROCW), protocol/procedure selection The function of the interface is selected with the FB 100 (PROCW). The channel number and protocols and procedures to be used can be determined here.
  • Page 127 Manual BG41/BG42/BG43 Software Examples: FB100 (PROCW) It should be operated without a protocol or a procedure through channel 1 of the building block. The building block’s base address is F0A0. Any error which may possibly arise, should be filed in the flag byte MB 127.

  • Page 128: Tab. 4-6: List Of Parameters For The Loading Of Fb3

    Handling with VIPA data handling blocks Manual BG41/BG42/BG43 4.1.5 Data handling without a protocol and procedure It is possible to transmit data to a peripheral piece of equipment without a procedure and protocols. One only has to define the respective channel with FB 100 (Code 00) as the general input/output interface.
  • Page 129 Manual BG41/BG42/BG43 Software FEHL All bits of these bytes are set to 0, if functioning correctly. In the case of a malfunction, an error code is entered. The error is acknowledged automatically, i.e. the byte is reset to 0 once the cause of the error has been eliminated. An overview of the possible error codes are to be found in chapter 4.1.5.3.

  • Page 130: Tab. 4-7: List Of Parameters For The Loading Of Fb4

    Handling with VIPA data handling blocks Manual BG41/BG42/BG43 4.1.5.2 FB4 (RECEIVE), data reception without a protocol and procedure This data block is used for receiving data without a protocol and procedure from a peripheral piece of equipment. For peripheral addressing please use FB 14.
  • Page 131 Manual BG41/BG42/BG43 Software Number of the bytes, reserved for the buffer, in the reception DB. The buffer is organised as a loop buffer, i.e. if the buffer is completely full, any further bytes will be recorded once again at the start of the buffer. FEHL The bits of these bytes are set at 0, if functioning correctly.

  • Page 132: Fig. 4-1: Evaluation Possibility 1 With The Help Of Write And Read Pointers

    Handling with VIPA data handling blocks Manual BG41/BG42/BG43 Example 1: Write and read pointer The read pointer is placed at the position of the write pointer, if the data received is processed by the user program. If data is newly received after this, the write pointer is again increased by one for every byte (calculated from the new starting point) and the read pointer is updated accordingly.

  • Page 133: Tab. 4-8: Error Code, Which Fehl Can Comprise Of

    Manual BG41/BG42/BG43 Software Example FB4 (RECEIVE) Data should be received on channel 1 and filed in DB 100. The receive buffer begins in DB 100 at DW5 and contains 40 bytes. The DIL switches are set to the absolute address F180h and any error which may arise is to be filed in MB20.

  • Page 134: Tab. 4-9: List Of Parameters For The Loading Of Fb40

    Handling with VIPA data handling blocks Manual BG41/BG42/BG43 4.1.6 Data handling with procedure STX/ETX The interfaces of the building blocks BG41, BG42 and BG43 can be operated with the procedure STX/ETX, if this function is selected in FB100 or FB101. The STX/ETX procedure is used for the transmission of ASCII characters (20h…7Fh).
  • Page 135 Manual BG41/BG42/BG43 Software E1/2 The ASCII character of the end identifier Left Byte: 1. end character Right Byte: 2. end character is used as the 2. end character 0h. In this way only one end character is evaluated. Character delay time in 50ms units. FEHL This byte has a value of 0, if functioning correctly.

  • Page 136: Handling With Procedure 3964(R)

    550 ms. In procedure 3964R: QVZ = 2000 ms In order to be able to work with procedure 3964 or 3964R, the following VIPA data handling blocks have been made available: SYNCHRON FB37 (from firmware level 401xV50 and all 4118) With this function block the building block is set to operate with the 3964(R) procedure, the baud rate and format of data transmission is selected and the size of the block and priority are set.

  • Page 137: Fig. 4-3: Procedure 3964(R)

    Manual BG41/BG42/BG43 Software 4.1.7.2 Procedure The following describes the structure of the procedure and the telegrams: Fig. 4-3: Procedure 3964(R) You can transmit max. 250 bytes per telegram. Rev. 99/49 4-21...

  • Page 138: Tab. 4-10:List Of Parameters For The Loading Of Fb37

    Handling with VIPA data handling blocks Manual BG41/BG42/BG43 4.1.7.3 FB37 (SYNCHRON) from firmware 401xV50 and all of 4118 for 3964(R) This data handling block prepares the interface building block for the operation of the procedure 3964(R). The data handling block must be loaded in all start branches (OB20,21,22) for each interface channel to be used.
  • Page 139 Manual BG41/BG42/BG43 Software FORM Transmission format: The command is a two-byte-command. High-Byte Operation with a procedure 3964 Operation with a procedure 3964(R) Low-Byte Transmission format of the serial interface. Priority: Controls the telegram procedure by initialization conflict PRIO low priority high priority The block size indicates how many bytes are to be exchanged between the PLC BLOC...
  • Page 140 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 Acknowledgement delay time in 10ms steps PAFE A byte contains a wrong number for output. PAFE provides the value 0, the parameter details are therefore correct. A value unequal to 0 represents an error.
  • Page 141 Manual BG41/BG42/BG43 Software The data handling block examines the parametrized values by the following limits: ADRE F080...F1FC SSNR 1...3 BAUD 1...11 FORM Data handling block examines High-Byte: 0 = 3964 1 = 3964(R) Low Byte: Transmission format of the serial interface. PRIO BLOC 16...128, always even-numbered...

  • Page 142: Tab. 4-11:List Of Parameters For The Loading Of Fb30

    Handling with VIPA data handling blocks Manual BG41/BG42/BG43 4.1.7.4 FB30 (SYNCHRON) up to firmware 4.1 for 3964(R) This data handling block prepares the interface building block for operation of the procedure 3964(R). The data handling block must be loaded in all start branches (OB20,21,22) for each interface to be used.
  • Page 143 Manual BG41/BG42/BG43 Software FORM Transmission format: The comand is a two-byte-command. High-Byte Operation with the procedure 3964 Operation with the procedure 3964(R) Low-Byte Transmission format of the serial interface. Priority: Controls the telegram procedure by initialization conflict PRIO low priority high priority BLOC The block size indicates how many bytes are to be exchanged between the PLC...
  • Page 144 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 A value uneven to 0 represents an error, the given interface is not initialized. PAFE Error Codes registered by: No Error Data handling block Wrong Command Interface building block Wrong channel number...
  • Page 145 Manual BG41/BG42/BG43 Software Example: FB30 (SYNCHRON) FB30 NAME :SYNCHRON ADRE :KH F080 Building block’s address as set by DIL switches SSNR :KF +1 Interface number 1,2,3 BAUD :KF +10 Baud rate code 1...11 (10 = 9600baud) FORM :KM 00000001 11111100 Transmission format:8bit,even parity,2 stop PRIO :KF +0...

  • Page 146: Tab. 4-12:List Of Parameters For The Loading Of Fb31

    Handling with VIPA data handling blocks Manual BG41/BG42/BG43 4.1.7.5 FB31 (RECEIVE), data reception for 3964(R) This data handling block is used for the importing of a telegram from the interfaces BG41, BG42 and BG43 when using the procedure 3964(R). In FB31 lubricating flags are used. These must be saved when loading the FB31 from a time or alarm protected OB.
  • Page 147 Manual BG41/BG42/BG43 Software ZTYP The telegram’s target type is to be entered into the PLC. Possible target types (data types) are: for data block for the process image of the inputs for the process image of the outputs for flag bytes for counter words for timer words Other details result in the parametrizing error message (PAFE) 21.
  • Page 148 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 ANZW Display word. The display word occupies a word. In the right byte status bits are filed. In the left byte a wrong number is filed, when the identifier “finished with error“ appears in the right byte.
  • Page 149 Manual BG41/BG42/BG43 Software PAFE Contains a byte for the issuing of an error number. If PAFE provides a value of 0, the parameter details are correct. A value unequal to 0 represents an error. PAFE Error codes No error Invalid address ADRE Invalid interface number SSNR Undefined answer received from interface building block Invalid DB no.
  • Page 150 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 Example: FB31 (RECEIVE ) by direct parametrizing: :SPA FB31 NAME :RECEIVE ADRE : KH F080 The address set by the DIL switches SSNR : KF +1 Interface number 1,2,3 A-NR : KF +3 Order number (1...255)

  • Page 151: Tab. 4-13:List Of Parameters For The Loading Of Fb33

    Manual BG41/BG42/BG43 Software 4.1.7.6 FB33 (SEND), data output for 3964(R) This data handling block is used to actively transmit a telegram to the interface building blocks BG41, BG42 and BG43 when using the procedure 3964(R). Lubricating flags are used in FB33. These must be saved before loading FB31 from a time or alarm protected OB.
  • Page 152 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 QTYP The source type is to be given in its own PLC. Possible source types are: for data blocks for data block development for the process image of inputs for the process image of outputs...
  • Page 153 Manual BG41/BG42/BG43 Software ANZW Display word. The display word contains one word. Status bits are filed in the right byte. An error number is filed in the left byte, if the idenfication “finished with an error“ appears in the right byte. The status identifiers in the right byte are structured as follows: Bit 0: Not used Bit 1: Job running...
  • Page 154 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 PAFE Contains a byte for the output of an errror number. If PAFE has a value of 0, the parameter details are correct. A value uneven to 0 represents an error. PAFE Error codes...
  • Page 155 Manual BG41/BG42/BG43 Software Example: FB33, (SEND) by direct parametrizing :SPA FB33 NAME :SEND ADRE : KH F080 The address set with DIL switches SSNR : KF +1 Interface number 1,2,3 A-NR : KF +4 Order number(1...255) QTYP : KC MB Source type QDBN : KY 0,0 DB no.

  • Page 156: Tab. 4-14:List Of Parameters For Loading Fb28

    Handling with VIPA data handling blocks Manual BG41/BG42/BG43 4.1.7.7 FB28 (FREIGABE), Building block release This data handling block resets the new start bit and releases the building block for SPS access. The building block is to be loaded at the end of the OB1. The new start bit is set in the OB22 by the user, if an automatic new start identifier is wanted.

  • Page 157: Handling With Prozedure 3964(R) With Rk512

    2000 ms In order to be able to work with the procedure 3964 or 3964R (called 3964(R) in the following) with the RK512 protocol, the following VIPA data handling blocks have been made available: SYNCHRON FB27 (from firmware level 401xV50 and 4118)
  • Page 158 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 FETCH FB25 With this function block data is requested from partner equipment. RECEIVE-ALL FB24 With this function block telegrams are received from partner equipment. SEND-ALL FB22 From this function block requested telegrams from the partner equipment are answered.

  • Page 159: Fig. 4-4: Structure Of The Procedure 3964(R) With Rk512

    Manual BG41/BG42/BG43 Software 4.1.8.2 Procedure The following describes the structure of the procedure and the telegrams: Fig. 4-4: Structure of the procedure 3964(R) with RK512 Time-outs: The following times are regarded as time-out: Acknowledgement delay time: (QVZ) = 2000 ms Character delay time: (ZVZ) = 220 ms...
  • Page 160 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 Passive operation: When the procedure driver is waiting for the connection set-up and receives a character unequal to STX, it transmits NAK. If it receives an NAK character, the procedure driver does not transmit an answer.

  • Page 161: Fig. 4-5: Send Of The Procedure 3964(R) With Rk512

    Manual BG41/BG42/BG43 Software 4.1.8.3 Logical telegram sequence SEND (Transmission of data) Fig. 4-5: SEND of the procedure 3964(R) with RK512 FETCH (Fetching data) Fig. 4-6: FETCH of the procedure 3964 (R) with RK512 The procedure waits in both cases a maximum of 5s for the response message, after which it stops receiving.

  • Page 162: Fig. 4-7: Structure Of An Output Telegram From 3964 (R) With Rk512

    Handling with VIPA data handling blocks Manual BG41/BG42/BG43 4.1.8.4 Telegram contents Structure of an output telegram Each telegram has a header. Depending on the history of the telegram traffic, the header contains all necessary information. Fig. 4-7: Structure of an output telegram from 3964 (R) with RK512 By data amounts >128 bytes, sequence telegrams are transmitted.

  • Page 163: Fig. 4-9: Example Of An Output

    Manual BG41/BG42/BG43 Software Example: Output telegram Fig. 4-9: Example of an output Rev. 99/49 4-47...

  • Page 164: Fig. 4-10: Structure Of A Normal Input Telegram

    Handling with VIPA data handling blocks Manual BG41/BG42/BG43 Structure of an input telegram Fig. 4-10: Structure of a normal input telegram By data amounts >128 Bytes, sequence telegrams are transmitted. Fig. 4-11: Structure of a sequence input telegramm 4-48 Rev. 99/49...

  • Page 165: Fig. 4-12: Example Of An Input Telegram

    Manual BG41/BG42/BG43 Software Example: Input telegram Fig. 4-12: Example of an input telegram Rev. 99/49 4-49...
  • Page 166 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 Coordination flag: The coordination flag is set in active operation in the partner PLC when a telegram is received. This occurs both by input and output commands. If the coordination flag is set and a telegram with this flag has been received, the data is not accepted (or passed on), but an error response message is transmitted (error code 32h).

  • Page 167: Tab. 4-15:List Of Parameters For Loading Fb27

    Manual BG41/BG42/BG43 Software 4.1.8.5 FB27 (SYNCHRON) of firmware 401xV50 and 4118 for 3964(R) with RK512 This data handling block prepares the interface building block for operation of the procedure 3964(R). The function block supports the procedure 3964(R) with the RK512 protocol. The data handling block must be loaded in all start branches (OB20, 21, 22) for each interface to be used.
  • Page 168 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 FORM Transmission format: The command is a two byte command. High-Byte Operation with the procedure 3964 Operation with the procedure 3964(R) Low-Byte Transmission format of the serial interface. PRIO Priority: Controls the telegram procedure by initialization conflict...
  • Page 169 Manual BG41/BG42/BG43 Software PAFE Contains a byte for issuing an error number. PAFE provides the value 0, the parameter details are therefore correct. A value unequal to 0 represents an error. A value unequal to 0 represents an error, the given interface is not initialised. PAFE Error codes registered by: No error...
  • Page 170 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 The data handling block examines the parametrized values at the following limits: ADRE F080...F1FC SSNR 1...2 (3) BAUD 1...11 FORM Data handling block examines High-Byte: 0 = 3964 1 = 3964R Low Byte:...

  • Page 171: Tab. 4-16:List Of Parameters For The Loading Of Fb20

    Manual BG41/BG42/BG43 Software 4.1.8.6 FB20 (SYNCHRON) up to firmware 4.1 for 3964(R) with RK512 This data handling block prepares the interface building block for the operation of the procedure 3964(R). The block supports the procedure 3964(R) with the RK512 protocol. The data handling block must be loaded in all start branches (OB20,21,22) for each interface to be used.
  • Page 172 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 FORM Transmission format: The command is a two byte command. High-Byte Operation with the procedure 3964 Operation with the procedure 3964(R) Low-Byte Transmission format of the serial interface. PRIO Priority: Controls the telegram procedure by initialization conflict...
  • Page 173 Manual BG41/BG42/BG43 Software PAFE Contains a byte for issuing an error number. PAFE provides the value 0, the parameter details are therefore correct. A value unequal to 0 represents an error. A value unequal to 0 represents an error, the given interface is not initialised. PAFE Error codes registered by: No error...
  • Page 174 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 Beispiel: FB20 (SYNCHRON) FB20 NAME :SYNCHRON ADRE :KH F080 Building block’s address as set with DIL switches SSNR :KF +1 Interface number 1,2 (3) BAUD :KF +10 Baud rate code 1...11 (10 = 9600baud)

  • Page 175: Tab. 4-17:List Of Parameters For The Loading Of Fb21

    Manual BG41/BG42/BG43 Software 4.1.8.7 FB21 (RECEIVE), data reception for 3964(R) with RK512 This data handling block is used to import a telegram from the interface building blocks BG41, BG42 and BG43 when using the procedure 3964(R). Lubricating flags are used in FB21. These must be saved before loading FB21 from a time or alarm protected OB.
  • Page 176 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 ZTYP The telegram’s target type is to be entered into the PLC. Possible target types (data types) are: for data handling block for data handling block development for process image of inputs...
  • Page 177 Manual BG41/BG42/BG43 Software ANZW Display word. The display word occupies a word. In the right byte status bits are filed. In the left byte a wrong number is filed, when the identifier “finished with error“ appears in the right byte. The status identifiers in the right byte are structured as follows: Bit 0: Not used Bit 1: Job is running...
  • Page 178 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 PAFE Contains a byte for issuing an error number. PAFE provides the value 0, the parameter details are therefore correct. A value unequal to 0 represents an error. PAFE Error codes No error...
  • Page 179 Manual BG41/BG42/BG43 Software Example: FB21 (RECEIVE ) by direct parametrizing: :SPA FB21 NAME :RECEIVE ADRE : KH F080 The address set with the DIL switches SSNR : KF +1 Interface number 1,2 (3) A-NR : KF +3 Order number (1...255) ZTYP : KC DB Target type DBNR : KY 0,5...

  • Page 180: Tab. 4-18:List Of Parameters For The Loading Of Fb23

    Handling with VIPA data handling blocks Manual BG41/BG42/BG43 4.1.8.8 FB23 (SEND), data output for 3964(R) with RK512 This data handling block is used to actively transmit a telegram to the interface building blocks BG41, BG42 und BG43 when using the procedure 3964(R) with the RK512 protocol.
  • Page 181 Manual BG41/BG42/BG43 Software QTYP The source type is to be entered into its own PLC. Possible source types are: for data blocks for data block development for the process image of inputs for the process image of outputs for flag bytes for counter words for timer words Other details result in the parametrizing error message PAFE: 27.
  • Page 182 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 ZDBN If the target type DB is selected, the DBNR is to be entered into the right byte. Valid area: 2...255. The receiver examines the parameters, if DB, DX are available with a valid DB, DX number.
  • Page 183 Manual BG41/BG42/BG43 Software ANZW Display word. The display word contains one word. Status bits are filed in the right byte. An error number is filed in the left byte, if the idenfication “finished with an error“ appears in the right byte. The status identifiers in the right byte are structured as follows: Bit 0: Not used Bit 1: Job running...
  • Page 184 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 PAFE Contains a byte for issuing an error number. PAFE provides the value 0, the parameter details are therefore correct. A value unequal to 0 represents an error. PAFE Error codes No error...
  • Page 185 Manual BG41/BG42/BG43 Software The data handling block examines the parametrized values at the following limits: ADRE F080...F1FC SSNR 1...2 (3) A-NR 1...255 QTYP DB,DX,EB,AB,MB,T,Z QDBN 2...255 QBWN depending on source type (0...) BWAN depending on source type (1...) ZTYP DB,DX,EB,AB,MB,T ,Z . ZDBN 2...255 ZBWN...
  • Page 186 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 Example: FB23, (SEND) by indirect parametrizing If the operands are to be indirectly transferred, it is possible in the following form. XX is to be parametrized on the operand QTYP. This is the identifier for indirect parametrizing. The DB number, in which the operands lie, are to given on the operand QDBN.

  • Page 187: Tab. 4-19:List Of Parameters For The Loading Of Fb25

    Manual BG41/BG42/BG43 Software 4.1.8.9 FB25 (FETCH), data request for 3964(R) with RK512 This data handling block is used to fetch data from another PLC through the interface building blocks BG41, BG42 and BG43 when using the procedure 3964(R) with the RK512 protocol. Source and target information is transferred when using this data handling block.
  • Page 188 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 QTYP The source type is to be entered into its own PLC. Possible source types are: for data blocks for data block development for the process image of inputs for the process image of outputs...
  • Page 189 Manual BG41/BG42/BG43 Software ZBWN Byte/word number. By means of these operands it is determined, from which word, e.g. data word of the given DB, or from which byte, e.g. AB, a received telegram should be filed. KOOR The usage of coordination flags is parametrized. In a high byte the byte number of the coordination flag must be parametrized and in a low byte its bit number must be parametrized.
  • Page 190 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 ANZW Display word. The display word contains one word. Status bits are filed in the right byte. An error number is filed in the left byte, if the idenfication “finished with an error“ appears in the right byte.
  • Page 191 Manual BG41/BG42/BG43 Software PAFE Contains a byte for issuing an error number. PAFE provides the value 0, the parameter details are therefore correct. A value unequal to 0 represents an error. PAFE Error codes No error Invalid address ADRE Invalid interface number SSNR Undefined answer received ffrom the interface building block Invalid DB no.
  • Page 192 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 Example: FB25, (FETCH) by direct parametrizing :SPA FB25 NAME :FETCH ADRE : KH F080 Address set with DIL switches SSNR : KF +1 Interface number 1,2 (3) A-NR : KF +4 Order number (1...255)
  • Page 193 Manual BG41/BG42/BG43 Software Example: FB25, (FETCH) by indirect parametrizing If the operands are to be indirectly transferred, it is possible in the following form. XX is to be parametrized on the operand QTYP. This is the identifier for indirect parametrizing. The DB number, in which the operands lie, are to given on the operand QDBN.

  • Page 194: Tab. 4-20:List Of Parameteres For The Loading Of Fb24

    Handling with VIPA data handling blocks Manual BG41/BG42/BG43 4.1.8.10 FB24 (RECEIVE-ALL), passive data reception for 3964(R) with RK512 This data handling block is used for importing a telegram from the interface building blocks BG41, BG42 and BG43 when using the procedure 3964(R) with a RK512 protocol.
  • Page 195 Manual BG41/BG42/BG43 Software ANZW Display Word. The display word occupies a word. In the right byte status bits are filed. In the left byte a wrong number is filed, when the identifier “finished with error“ appears in the right byte. The status identifiers in the right byte are structured as follows: Bit 0: Not used Bit 1: Job is running...
  • Page 196 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 PAFE Contains a byte for issuing an error number. PAFE provides the value 0, the parameter details are therefore correct. A value unequal to 0 represents an error. PAFE Error codes No Error...

  • Page 197: Tab. 4-21:List Of Parameters For The Loading Of Fb22

    Manual BG41/BG42/BG43 Software 4.1.8.11 FB22 (SEND-ALL), requested data output for 3964(R) with RK512 This data handling block is used for transmitting telegrams to the interface building blocks BG41, BG42 and BG43, when using the procedure 3964(R) with the RK512 protocol. The building block transfers the requested data in a telegram on the interface building blocks.
  • Page 198 Handling with VIPA data handling blocks Manual BG41/BG42/BG43 Coordination flag: The protocol 3964(R) supports the usage of a coordination flag. This flag is used for blocking access to the source area or to allow the reading of the source area. The coordination flag is given by the sender of the request telegram in the telegram header.

  • Page 199: Tab. 4-22:List Of Parameters For The Loading Of Fb28

    Manual BG41/BG42/BG43 Software 4.1.8.12 FB28 (FREIGABE), release of building block This data handling block resets the new start bit and releases the building block for SPS access. The block is to be loaded at the end of the OB1. The new start bit is set by the user in the OB22, if an automatic new start identifier is requested. This bit is to be given by the individual data handling blocks as the identifier "NEUS".

  • Page 200: Application Of Interfaces Without Data Handling Blocks

    Application of interfaces without data handling blocks Manual BG41/BG42/BG43 4.2 Application of interfaces without data handling blocks 4.2.1 Address allocation The building blocks occupy four (BG41) or eight (BG42, BG43) successive addresses in the PLC’s address area. The setting of the base address, under which the building block should respond, is described in chapter 5.1.

  • Page 201: Interface Channel

    Manual BG41/BG42/BG43 Software 4.2.2 Interface channel Status register interface channel Fig. 4-14: status register interface channel If the bits to be evaluated are set, the interfaces have the following status: BIT 7 = 1: indicates, that the transmission buffer of the respective channel is empty i.e. without further status query, 256 bytes can be written in succession into the data channel.

  • Page 202: Fig. 4-15: Data Register Interface Channel

    Application of interfaces without data handling blocks Manual BG41/BG42/BG43 BIT 5 = 1: indicates, that the building block has received data, which is to be found in the reception buffer. If the corresponding channel also functions as the receiver, this bit should be cyclically polled, so that the data can be read where necessary.

  • Page 203: Parameter Channel

    Manual BG41/BG42/BG43 Software 4.2.3 Parameter channel Status register parameter channel Fig. 4-16: Status register parameter channel If the bits to be evaluated are set, the interface has the following status: BIT 7 = 1 as status interface channel BIT 6 = 1 as status interface channel BIT 5 = 1 as status interface channel...

  • Page 204: Acknowledgement And Error Code

    Application of interfaces without data handling blocks Manual BG41/BG42/BG43 4.2.4 Acknowledgement and error code Acknowledgement The commands 4 and 5 are confirmed by an acknowledgement, which must be received over the data register of channel 0. The acknowledgement consists of two bytes. In the first byte the command and the channel number are repeated.

  • Page 205: Plc Interface Parameter Channel

    Manual BG41/BG42/BG43 Software 4.2.5 PLC interface parameter channel By means of the parameter channel (channel 0), the building block can be given different commands, which are significant for the input/output channel. With software it is possible to •= reset or re-parametrize the building block •= read or set the date/time •= determine the protocol for the interface •= set the baud rate and the data format for the serial interface module...
  • Page 206 Application of interfaces without data handling blocks Manual BG41/BG42/BG43 4.2.5.1 Reset the entire building block Command 0 This byte is a one-byte command and does not require a channel number, as it is effective for the whole building block. It is automatically triggered by a new start in PLC, when the building block is addressed in the periphery area.
  • Page 207 Manual BG41/BG42/BG43 Software 4.2.5.2 Resetting the transmission and reception buffers for the interface channel Command 1 This command deals with a one-byte command. The channel number, whose transmission and reception buffers are to be deleted, is to be entered into the right nibble. Example: The transmission and reception buffer of channel 1 are to be deleted.

  • Page 208: Fig. 4-22: Code/Baud Rate

    Application of interfaces without data handling blocks Manual BG41/BG42/BG43 4.2.5.3 Change the channel’s baud rate Command 2 This command is a two-byte command and requires the transfer of the code for the baud rate into the second byte. If a baud rate of 38400 baud is used, the plug connector J11 on the base circuit board is to be placed in position 38.4.

  • Page 209: Fig. 4-24: Example 2, Changing The Baud Rate

    Manual BG41/BG42/BG43 Software Example 2: Channel 2 should be set to 300 baud. J11 is plugged into position 38400 Fig. 4-24: Example 2, changing the baud rate Rev. 99/49 4-93...

  • Page 210: Fig. 4-25: Changing The Data Format With Command 3

    Application of interfaces without data handling blocks Manual BG41/BG42/BG43 4.2.5.4 Changing the channel’s data format Command 3 This command is a two-byte command and requires the mode, which is to be used, to be entered into the second byte. This byte is structured as follows: Fig.

  • Page 211: Fig. 4-26: Example Of How To Change The Data Format Of A Channel

    Manual BG41/BG42/BG43 Software Example: Channel 1 should be set with the following parameters: - 7 Data bits - 1 Stop bits - Uneven priority Fig. 4-26: Example of how to change the data format of a channel Rev. 99/49 4-95...
  • Page 212 Application of interfaces without data handling blocks Manual BG41/BG42/BG43 4.2.5.5 Operating the clock Command 4 With this command it is necessary to enter the channel number 0, as it applies for the entire building block and is not assigned to any interface. It is a command, which can contain 2 to 22 Bytes.
  • Page 213 Manual BG41/BG42/BG43 Software Instruction 02: Set date and time Instruction 02 is not available when using the DCF77 module. Fig. 4-28: Operating the clock, command 4, instruction 02 After instruction 02 (set time and date) further information is required, which is to be entered in 7 successive bytes.
  • Page 214 Application of interfaces without data handling blocks Manual BG41/BG42/BG43 Example : To be set: Tuesday 06.06.95 14:53:00 Command: Operating the clock Instruction: Set clock Seconds 00h Minutes 53h Hours 14h Day 06h 4-98 Rev. 99/49...
  • Page 215 Manual BG41/BG42/BG43 Software Month 06h Year 95h Weekday Tuesday 02h Rev. 99/49 4-99...
  • Page 216 Application of interfaces without data handling blocks Manual BG41/BG42/BG43 Instruction 03: Put clock 1 hour forward (Changing from winter to summer time) Instruction 03 is not available when using a DCF77 module. Two acknowledgement bytes are returned. Fig. 4-29: Operating the clock, command 4, instruction 03 Instruction 04: Put clock back 1 hour.
  • Page 217 Manual BG41/BG42/BG43 Software Instruction 05: Date and time are to be transferred to the PLC as ASCII code. (20 bytes, after 2 acknowledgement bytes) Fig. 4-31: Operating of the clock, command 4, instruction 05 After the two acknowledgement bytes, the following character string, for example, is transferred to the PLC: Tuesday 06.06.1995...
  • Page 218 Application of interfaces without data handling blocks Manual BG41/BG42/BG43 4.2.5.6 Selection of function (protocols and procedures) Command 5 This command is a two-byte command. The first byte contains the command and the channel number, for which the function is valid. The function is selected with the second byte with the aid of a code.

  • Page 219: Fig. 4-34: Function Selection (Protocols And Procedures) With Command 5, Example3

    Manual BG41/BG42/BG43 Software Example 2: Channel 2 should be operated without a protocol/procedure. Fig. 4-33: Function selection (protocols and procedures) with command 5, example 2 Two acknowledgement bytes are returned. Example 3: Channel 3 should be operated with an STX/ETX protocol. Fig.
  • Page 220 Application of interfaces without data handling blocks Manual BG41/BG42/BG43 4.2.5.7 Parameter description of STX/ETX Command 8 Start and end characters and the delay time of the STX/ETX protocol can be altered with this command. Standard defaults: ETX1 03h ETX2 00h ZVZ 00h Mode 00h This command effects the protocol type STX/ETX (Code 01), which must be activated by command...
  • Page 221 Manual BG41/BG42/BG43 Software Example The following parameters are to be entered via channel 2: STX character: 08h, first ETX character: 07h, second ETX character: 06h, ZVZ: 100ms, Mode: FIFO with a depth of 2 telegrams. Fig. 4-35: Example of STX/ETX parametriezed with command 8 Rev.
  • Page 222 Application of interfaces without data handling blocks Manual BG41/BG42/BG43 4-106 Rev. 99/49...

  • Page 223: Startup

    5.2.7 Setting the address with DIL switches S1 and S2 5.2.8 Plug connectors J6, J11 and J12 5-10 5.2.9 Voltage supply of the module 5-12 5.3 Software installation of VIPA’s data handling blocks 5-15 5.4 Startup response 5-17 5.5 Error diagnosis 5-18 5.5.1 Errors in serial communication...
  • Page 225 Manual BG41/BG42/BG43 Startup 5 Startup 5.1 Startup procedure •= Connect the corresponding module to the building block. •= If a 24V supply is necessary on the modules, equip them with the respective jumpers (see chapter 5.2.9). •= Address the building block with the respective DIL switches (see chapter 5.2.7). •= Switch off the current supply at the PLC and plug the building block according to the instructions into your PLC (see chapter 5.2).

  • Page 226: Fig. 5-1: Mounting Place In Plc-115U

    Presetting Manual BG41/BG42/BG43 5.2 Presetting 5.2.1 Mounting place in PLC-115U Fig. 5-1: Mounting place in PLC-115U The grey areas show where the cards may be plugged in. In these mounting places the 24V are not available. Please observe the DIL switch positions when using the IM mounting places. Rev.

  • Page 227: Fig. 5-2: Mounting Places In Plc-135U

    Manual BG41/BG42/BG43 Startup 5.2.2 Mounting places in PLC-135U Fig. 5-2: Mounting places in PLC-135U The grey areas show where the cards may be plugged into. In these mounting places the 24V are available for the active TTY interface Rev. 99/49...

  • Page 228: Fig. 5-3: Mounting Place In Plc-150U

    Presetting Manual BG41/BG42/BG43 5.2.3 Mounting place in PLC-150U Fig. 5-3: Mounting place in PLC-150U The grey areas show where the cards may be plugged into. In these mounting places the 24V are available for the active TTY interface. Rev. 99/49...

  • Page 229: Fig. 5-4: Mounting Place In Plc-155U

    Manual BG41/BG42/BG43 Startup 5.2.4 Mounting place in PLC-155U Fig. 5-4: Mounting place in PLC-155U The grey areas show where the cards may be plugged into. In these mounting places the 24V are available for the active TTY interface. Rev. 99/49...

  • Page 230: Fig. 5-5: Mounting Place In Eg-185U

    Presetting Manual BG41/BG42/BG43 5.2.5 Mounting place in EG-185U Fig. 5-5: Mounting place in EG-185U The grey areas show where the cards may be plugged into. In these mounting places the 24V are available for the active TTY interface. In all other expanded equipment 24V are not available. The interface card can be operated in all mounting places.

  • Page 231: Fig. 5-6: Mounting Places In Plc-188U

    Manual BG41/BG42/BG43 Startup 5.2.6 Mounting places in PLC-188U Fig. 5-6: Mounting places in PLC-188U The grey areas show where the cards may be plugged into. In these mounting places the 24V are available for the active TTY interface. Rev. 99/49...

  • Page 232: Setting The Address With Dil Switches S1 And S2

    Presetting Manual BG41/BG42/BG43 5.2.7 Setting the address with DIL switches S1 and S2 The start address, under which the interface building block can be operated by the automation equipment, is set with the DIL switches S1 and S2. The addressing of the interface building block is not dependant upon the mounting place! The address, under which it is controlled, is only dependant upon the setting of the DIL switches and not from the mounting place in the SPS, i.e.
  • Page 233 Manual BG41/BG42/BG43 Startup 5.2.7.1 Examples Three examples on addressing are shown in the following. With the exclusion of the switches EG and IM (DIL switch S1) the addresses are depicted in reverse (log. 1 == OFF, log. 0 == ON). Example 1 The building block is be used in a central device and is controlled under the start address PY128 (=F080h).

  • Page 234: Plug Connectors J6, J11 And J12

    Presetting Manual BG41/BG42/BG43 5.2.8 Plug connectors J6, J11 and J12 Plug connector J6 With the plug connector J6 the voltage supply is switched (internally via X1 and X2, externally via the 25-pole SubD socket(s)). In the position shown here, the plug connector is in the parking position (state at delivery).

  • Page 235: Fig. 5-7: Position Of The Jumpers And The Dil Switches On The Bg43

    Manual BG41/BG42/BG43 Startup Position of the DIL switches and plug connectors Fig. 5-7: Position of the jumpers and the DIL switches on the BG43 Rev. 99/49 5-11...

  • Page 236: Voltage Supply Of The Module

    Presetting Manual BG41/BG42/BG43 5.2.9 Voltage supply of the module Internal voltage supply via the If the PLC on the bus provides 24V, the supply of the current sources can take place via the bus. By means of the connector back plane bus field J6 on the base circuit board, one can choose if the 24V should be taken from the top or the bottom base plug.

  • Page 237: Fig. 5-8: Circuit Diagram Of The Building Block Bg43, For Example

    Manual BG41/BG42/BG43 Startup 5.2.9.1 Circuit diagram 24V supply BG43 Fig. 5-8: Circuit diagram of the building block BG43, for example Rev. 99/49 5-13...
  • Page 238 Presetting Manual BG41/BG42/BG43 External voltage supply via The plug connectors J1 and J2 are to be found on the 20mA module the 25-pole SubD socket and the combination module and can be switched to external and internal voltage supply. The plug bridge M24 (J1) switches the grounding conductor, the plug bridge P24 (J2) switches the 24 V.

  • Page 239: Software Installation Of Vipa's Data Handling Blocks

    Startup 5.3 Software installation of VIPA’s data handling blocks The data handling blocks which can be acquired from VIPA are found in a packed form on the disk (Order-No.VIPA SSM-SW433). To install these data handling blocks, please follow the following steps, which may also be found on the disk in the file "Read.me".
  • Page 240 Software installation of VIPA’s data handling blocks Manual BG41/BG42/BG43 analogst.s5d Data handling blocks for the analogue module MD40 - MD49 for all CPUs. ssi@@@st.s5d Data handling blocks for a synchronized serial interface for all CPUs. hohzusst.s5d Data handling blocks for Hohner absolute value generator for all CPUs.

  • Page 241: Startup Response

    Manual BG41/BG42/BG43 Startup 5.4 Startup response Network-ON • after plugging in the building block for the first time the standard parameters are set: Standard function (without procedure/protocol) Baud rate 9600 baud Even parity 1 Start bit 8 Data bits 2 Stop bits all buffers are reset STOP-START •...

  • Page 242: Error Diagnosis

    Error diagnosis Manual BG41/BG42/BG43 5.5 Error diagnosis 5.5.1 Errors in serial communication • • • • = = = = The PLC goes into the operation state STOP once the data handling blocks are loaded Reason: The building block address (DIL switch) do not match the address of the handling blocks (parameter ADR).

  • Page 243: Application Of The Diagnostic Interface

    VIPA offers a diagnostic adaptor for connecting it to your PC. The adaptor cable is connected to both of the serial interfaces on your PC. The TTL signal is converted to the RS232C signal on the diagnostic adaptor.

  • Page 244: Fig. 5-10: Pin Allocation Of The Diagnostic Socket

    Error diagnosis Manual BG41/BG42/BG43 5.5.2.1 Pin allocation of the diagnostic socket Fig. 5-10: Pin allocation of the diagnostic socket 5-20 Rev. 99/49...

  • Page 245: Examples

    Manual BG41/BG42/BG43 Startup 5.6 Examples 5.6.1 STX/ETX With this example a SEND order from interface 1 to interface 2 of an SSM-BG42 or an SSM-BG43 is realised. With the FB ‘PARA-STX’ the start character is restricted to STX (02H) and the end characterisation is restricted to the end character ETX (03h) and EOT (04H).
  • Page 246 Examples Manual BG41/BG42/BG43 Restart OB OB21 #5095 00000 00002 :SPA FB 100 NAME #PROCW =KH F080 Base address KANR =KF +1 Interface number PROC =KF +1 Procedure STX/ETX FEHL =MB 199 Error byte 0000E 00010 :SPA FB 40 NAME #PARA-STX =KH F080 Base address =KY 1,1...
  • Page 247 Manual BG41/BG42/BG43 Startup Power On OB OB22 #5095 00000 00002 :SPA FB 100 NAME #PROCW =KH F080 Base address KANR =KF +1 Interface number PROC =KF +1 Procedure STX/ETX FEHL =MB 199 Error byte 0000E 00010 :SPA FB 40 NAME #PARA-STX =KH F080 Base address =KY 1,1...
  • Page 248 Examples Manual BG41/BG42/BG43 Cycle OB #5104 00000 00002 KF +8 Send data from DW8 00006 MW 10 00008 KF +16 Send 16 byte 0000C MB 12 0000E 00010 M 1.0 Send initiation 00012 M 13.0 Set transmission access 00014 :SPA FB 43 NAME #STX-SEND =KH F080 Base address...

  • Page 249: 3964R

    Manual BG41/BG42/BG43 Startup 5.6.2 3964R With this example a SEND order from interface 1 to interface 2 of the SSM-BG42 or the SSM- BG43 is realised. The SEND order is initiated by setting the M1.0. After the order is completed the M1.0 is reset. As described in this example, the FB ‘SEND’...
  • Page 250 Examples Manual BG41/BG42/BG43 Restart OB OB21 #6075 00000 :SPA FB 37 NAME #SYNCHRON ADRE =KH F080 Base address SSNR =KF +1 Interface number BAUD =KF +10 Baud rate (9600) FORM =KM 00000001 11111100 Parity even,2 Stop bits,8 bits per byte PRIO =KF +0 Low transmission priority BLOC =KF +64...
  • Page 251 Manual BG41/BG42/BG43 Startup Cycle OB #5104 00000 00002 M 1.0 00004 :SPB FB 33 NAME #SEND ADRE =KH F080 Base address SSNR =KF +1 Interface number A-NR =KF +1 Order number QTYP =KC MB Source area is flag QDBN =KY 0,0 Irrelevant QBWN =KY 0,5 From MB 5...

  • Page 252: 3964R With Rk512

    Examples Manual BG41/BG42/BG43 5.6.3 3964R with RK512 With this example the SEND order between interface 1 and 2 and a FETCH order between interface 2 and 3 of the building block BG42 and BG43 are realised. The SEND order is initiated by setting the flag M1.0. After the SEND order is completed M1.0 is reset.
  • Page 253 Manual BG41/BG42/BG43 Startup Restart OB OB21 #6075 00000 :SPA FB 27 NAME #SYNCHRON ADRE =KH F080 Base address SSNR =KF +1 Interface number BAUD =KF +10 Baud rate (9600) FORM =KM 00000001 11111100 Parity even, 2 Stop bits, 8 bits per byte PRIO =KF +0 Low transmission priority BLOC =KF +64...
  • Page 254 Examples Manual BG41/BG42/BG43 Cycle OB 00001 M 1.0 Send access 00002 :SPB FB 23 NAME #SEND ADRE =KH F080 Base address SSNR =KF +1 Interface number A-NR =KF +1 Order number QTYP =KC DB Source is DB QDBN =KY 0,10 Number of data blocks QBWN =KY 0,0 1.

  • Page 255: Structure Guidelines

    Manual BG41/BG42/BG43 Startup 5.7 Structure guidelines The structure guidelines contain information on the interference immune structure of stored- program controls. It is described how interferences in automation equipment can occur, how electromagnetic compatibility (EMC) can be saved and how to act by a screening. 5.7.1 What does EMC mean? One understands by electromagnetic compatibility (EMC) the capability of an electric piece of equipment to function without an error in a pre-given electromagnetic environment, without being...

  • Page 256: The Most Important Basic Rules To Guarantee Emc

    Use metallic or metallized connector housing for screened data cables. •= Use special EMC measures in particular application cases. Wire all inductances with capacities, which are not controlled by VIPA building blocks. Use incandescent lamps to illuminate the barriers and avoid fluorescent lamps.

  • Page 257: Screening Of Cables

    Manual BG41/BG42/BG43 Startup 5.7.4 Screening of cables Electric, magnetic or electromagnetic interference fields are weakened by a screening; here one talks about damping. Interfering currents are conducted to earth on cable screens through screen rails conductively connected to the case. Here one must insure, that the connection to the protective earth conductor is impedance weak, or else the interference currents would become interference sources.
  • Page 258 Structure guidelines Manual BG41/BG42/BG43 5-34 Rev. 99/49...

  • Page 259: Technical Data

    Technical data 6.1 Interface building blocks 6.2 Module 6.2.1 20mA current loop module 6.2.2 20mA-/RS232C combination module 6.2.3 RS232C module 6.2.4 RS422/RS485 module 6.2.5 RS422P/RS485P module 6.2.6 CENTRONICS module 6.2.7 SSI module 6.2.8 Counter module (5V/24V) 6.2.9 Analogue input module 6.2.10 Analogue output module 6.2.11 DCF77 antenna module 6-10...
  • Page 261 Manual BG41/BG42/BG43 Technical data 6 Technical data 6.1 Interface building blocks Voltage supply +5 V ± 5 % Current consumption 600 mA Internal processor clock frequency 10 MHz Rate of transmission 75 ... 38.400 baud asynchronous Handshake by RS232C RTS/CTS Dimensions - Height 233,4 mm...
  • Page 262 Module Manual BG41/BG42/BG43 6.2 Module 6.2.1 20mA current loop module Current supply +5 V (via building block) Current consumption 12 mA Rate of transmission asynchronous 75 ... 38.400 baud Handshake Potential separation 20 mA current sources Load voltage DC 24 V - valid area 10 V ...
  • Page 263 Manual BG41/BG42/BG43 Technical data 6.2.2 20mA-/RS232C combination module Voltage supply +5 V (via building block) Current consumption 30 mA Rate of transmission asynchronous 75 ... 38.400 baud Handshake RTS/CTS Potential separation: - 20 mA Current Loop - RS232C 20 mA current sources Load voltage typ.
  • Page 264 Module Manual BG41/BG42/BG43 6.2.4 RS422/RS485 module Voltage supply +5 V (via building block) Current consumption 85 mA Potential separation Rate of transmission asynchronous 75 ... 38.400 baud 100 Ω (connectable through socket link) Terminal resistance Dimensions - Height 50 mm - Depth 70 mm with LED 6.2.5 RS422P/RS485P module...

  • Page 265: Ssi Module

    Manual BG41/BG42/BG43 Technical data 6.2.6 CENTRONICS module Voltage supply +5 V (via building block) Current consumption 40 mA Potential separation Dimensions - Height 50 mm - Depth 70 mm with LED 6.2.7 SSI module Width of data word 24 bit hardwired Type of data Binary or Gray code can be selected by hardware adjustment...

  • Page 266: Counter Module (5V/24V)

    Module Manual BG41/BG42/BG43 6.2.8 Counter module (5V/24V) Voltage supply +5 V (via building block) Current consumption 390 mA Number of counters Frequency max. 250 kHz Outputs for Carry-Borrow 1 per counter Types of operation Voltage input MD18 (24V counter) - 0 level 0 ...

  • Page 267: Analogue Input Module

    Manual BG41/BG42/BG43 Technical data 6.2.9 Analogue input module MD40, MD41, MD42, MD43 Number of inputs Potential separation yes (Inputs versus earth point and not inputs against each other) Input areas (nominal values) - MD40 ±10 V or 0 ... 20 V - MD41 ±5 V or 0 ...
  • Page 268 Module Manual BG41/BG42/BG43 Temperature error ±0,1 % Rating of the isolation according to VDE 0160 Line length screened max. 200 m Voltage supply +5 V (via building block) current consumption typ. 133 mA Dimensions - Height ca. 50,8 mm - Depth ca.

  • Page 269: Analogue Output Module

    Manual BG41/BG42/BG43 Technical data 6.2.10 Analogue output module Number of Outputs Potential separation yes (Outputs versus earth points, not outputs against each other) Output areas (nominal values) - MD45 ±10 V - MD46 ±5 V - MD47 0...10 V - MD48 0...5 V - MD49 0...20 mA or 4...20 mA...

  • Page 270: Dcf77 Antenna Module

    Module Manual BG41/BG42/BG43 6.2.11 DCF77 antenna module Voltage supply +24 V (via interface module) Current consumption max. 20 mA Reception frequency 77,5 kHz Reception area ca.1.500 km radius around Frankfurt/Main Width of band ca. 30 Hz Standard perimeter ca. 40 dB Plug connector 25pol.

  • Page 271: Fb's Memory Space Requirement

    Manual BG41/BG42/BG43 Technical data 6.3 FB’s memory space requirement FB-No. Size in Bytes 150AK 150U 941-944 130WB 135R 135S 928/B FB10 FB11 FB12 FB13 FB14 FB15 FB16 FB17 1098 1178 1284 1142 FB18 FB20 FB21 1636 1512 1642 1568 1936 FB22 1054 1106...

  • Page 272: Overview Cycle Load

    Overview cycle load Manual BG41/BG42/BG43 6.4 Overview cycle load The tables contain the necessary time for the transmission from the SPS to the building block. CPU928B Action Transfer Length in Byte Cycle load in ms SEND RECEIVE CPU943B Action Transfer Length in Byte Cycle Load in ms ASCII, STX/ETX 3964R SEND...
  • Page 273 Manual BG41/BG42/BG43 Technical data CPU945 Action Transfer Length in Byte Cycle Load in ms ASCII, STX/ETX 0,15 1,25 3964R SEND 3964R RECEIVE CPU948 Action Transfer Length in Byte Cycle Load in ms ASCII, STX/ETX 0,24 3964R SEND 3964R RECEIVE Rev. 99/49 6-13...
  • Page 274 Overview cycle load Manual BG41/BG42/BG43 6-14 Rev. 99/49...

  • Page 275: Appendix

    Appendix A List of figures ......................A-1 B Index of tables ......................B-1 C Index ........................C-1...
  • Page 277 Manual BG41/BG42/BG43 List of figures Appendix A List of figures Fig. 1-1: Deliverable interface building blocks ................1-4 Fig. 2-1: Data transfer via interface ( Example Module BG41) ............2-1 Fig. 2-2: Front panel of building block BG41 .................. 2-2 Fig.
  • Page 278 List of figures Manual BG41/BG42/BG43 Fig. 3-28: Block diagram of an SSI....................3-27 Fig. 3-29: Function selection SSI with command 5 ................3-30 Fig. 3-30: Reading of an SSI encoder with command 1 ..............3-31 Fig. 3-31: Setting of the mode SSI with command 3 ..............3-32 Fig.
  • Page 279 Manual BG41/BG42/BG43 List of figures Fig. 4-8: Structure of output sequence telegrams from 3964 (R) with ........... 4-46 Fig. 4-9: Example of an output ....................... 4-47 Fig. 4-10: Structure of a normal input telegram ................4-48 Fig. 4-11: Structure of a sequence input telegramm ............... 4-48 Fig.
  • Page 280 List of figures Manual BG41/BG42/BG43 Rev. 99/49...
  • Page 281 Manual BG41/BG42/BG43 Index of tables B Index of tables Tab. 2-1: Allocation of the backplane connector X1................ 2-8 Tab. 2-2: Allocation of the backplane connector X2................ 2-8 Tab. 3-1: LED-indicators on the modules ..................3-2 Tab. 3-2: Selection table: function - module - function blocks ............3-3 Tab.
  • Page 282 Index of tables Manual BG41/BG42/BG43 Tab. 4-20: List of parameteres for the loading of FB24..............4-78 Tab. 4-21: List of parameters for the loading of FB22 ..............4-81 Tab. 4-22: List of parameters for the loading of FB28 ..............4-83 Tab. 6-1: Memory space requirements of the individual FBs ............6-11 Rev.
  • Page 283 Manual BG41/BG42/BG43 Index C Index FB56 (MIN/MAX)..........3-58 FB57 (IN_MW) ..........3-59 20mA Current Loop Module ........3-4 FB58 (IN_DW)..........3-60 Connection Example..........3-7 Analogue Input Module.......... 3-47 Data Flow............3-48 Pin Allocation............3-5 Functional Mode ..........3-50 Structure ...............3-4 Overview............3-47 Voltage Supply .............3-6 20mA Current Loop/RS232C Combination Module Pin Allocation ............
  • Page 284 Point to Point Connection ........3-16 Startup Procedure..........5-1 Structure............. 3-14 Startup Response..........5-17 Two-wire Connection......... 3-17 VIPA's Data Handling Blocks......5-15 RS422P/RS485P Module........3-20 Voltage Supply of the Module ......5-12 Pin Allocation ............ 3-21 Installation Guidelines Interference Effects..........5-31 Structure.............
  • Page 285 SSI Module Parameter Channel......3-30 SSI Module Read Encoder Command 1 .... 3-31 Use the Clock Command 4 ........ 4-96 Write and Read Pointers ......... 4-15 VIPA Data Handling Blocks ........4-2 Voltage Supply............5-12 by back plane bus ..........5-12 M. Stich...
  • Page 286 Index Manual BG41/BG42/BG43 Rev. 99/49...

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