SMART Embedded Computing COMX-P2020 Installation And Use Manual page 53

Signal name
Function
Select Option
Default value
Supported configuration
Signal name
Function
Select Option
Default value
Supported configuration
Signal name
Function
Select Option
Default value
Supported configuration
COMX-P2020 Module Installation and Use (6806800K97F)
Controls, LEDs, and Connectors
LGPL3/LFWP, LGPL5
Boot Sequencer
(cfg_boot_seq[0:1])
PU / PD Resistors
11
00 Reserved
Normal I2C addressing mode is used. Boot
sequencer is enabled and loads configuration
01
information from a ROM on the I2C 1 interface. A
valid ROM must be present.
Extended I2C addressing mode Is used. Boot
sequencer is enabled and loads configuration
10
information from a ROM on the I2C 1 interface. A
valid ROM must be present.
Boot sequencer is disabled. No I2C ROM is
11
accessed.
TSEC2_TXD1
DDR SDRAM Type
(cfg_dram_type)
PU / PD Resistors
1
0 DDR2; 1.8v
1 DDR3; 1.5v
LGPL1
eTSEC2 SGMII Mode
(cfg_sgmii2)
PU / PD Resistors
1
The eTSEC2 Ethernet interface operates in SGMII
0
mode and uses SGMII SerDes lane 2 pins.
The eTSEC2 Ethernet interface operates in parallel
1
mode and uses the eTSEC2_* pins.
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