External Clock/Data Reference Inputs & Clock Reference Output; Specifications; Ω /75 - HP 37718A Installation And Verification Manual

2.048 Mb/s MTS
10 MHz Reference
1.544 Mb/s BITS
64 kb/s
STM-1/STS-3 Receive Recovers clock from received STM/STS input signal.
N OT E
Performance Tests
External Clock/Data Reference Inputs & Clock Reference Output
External Clock/Data Reference Inputs & Clock
Reference Output
Specifications
Clock Rate
The Rates available are dependent on the HP 37718A/19A option
Description
This test verifies that signal integrity is maintained when an
EXTERNAL clock is used as a reference.
Equipment Required
Synthesizer
PDH/DSn Test Set
Ω Ω
110 /75 Balanced to
Unbalanced Converter
Frequency Counter
64kb/s Test Set
Description
Accepts timing reference as per ITU-T G.811
Accepts 10 MHz timing reference
Accepts DS-1 timing reference as per TA-TSY-
000378
Accepts 64 kb/s timing reference as per ITU-T G.703
Section 1.2.2
: HP 3335A option 001 (75
: HP 37718A/19A
: HP 15508B
: HP 5335A Opt 010
: HP 37732A
Ω
)
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