Silicon Laboratories Si5316 Series Reference Manual page 7

Si53xx-RM
Figure 36. Typical Output Circuit (Not CMOS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Figure 37. Typical CMOS Output Circuit (Tie CKOUTn+ and CKOUTn– Together) . . . . . . . 108
Figure 38. Differential Input Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Figure 39. CKOUT Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Figure 40. CMOS External Reference Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Figure 41. Sinewave External Clock Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Figure 42. Differential External Reference Input Example . . . . . . . . . . . . . . . . . . . . . . . . . . .111
Figure 43. Three Level Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Figure 44. Three Level Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
9. Power Supply
Figure 45. Typical Power Supply Bypass Network (TQFP Package) . . . . . . . . . . . . . . . . . . 114
Figure 46. Typical Power Supply Bypass Network (QFN Package) . . . . . . . . . . . . . . . . . . . 114
10. Packages and Ordering Guide
Appendix A—Narrowband References
Figure 47. Typical Reference Jitter Transfer Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Appendix B—Frequency Plans and Jitter Performance
(Si5316, Si5319, Si5323, Si5326, Si5366, Si5368)
Figure 48. Jitter vs. f3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Figure 49. Jitter vs. f3 with FPGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Figure 50. Reference vs. Output Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Figure 51. Jitter vs. Reference Frequency (1 of 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Figure 52. Jitter vs. Reference Frequency (2 of 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Appendix C—Typical Phase Noise Plots
Appendix D—Alarm Structure
Figure 53. Si5326 Alarm Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
Figure 54. Si5368 Alarm Diagram (1 of 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Figure 55. Si5368 Alarm Diagram (2 of 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
Appendix E—Internal Pullup, Pulldown by Pin
Appendix F—Typical Performance
Document Change List
Contact Information
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