Avalue Technology EAX-C236KP User Manual page 66

EAX-C236KP User's Manual
L1 Substates
PCIe Speed
Detect Timeout
3.6.3.2.1.2 mPCIe/mSATA Slot (PCI-E Port 5)
Item
mPCIe/mSATA Slot (PCI-E Port 5)
ASPM
L1 Substates
66 EAX-C236KP User's Manual
L1
L0s
Disabled
Disabled
L1.1
L1.2
L1.1 & L1.2[Default]
Auto[Default]
Gen1
Gen2
Gen3
0
Option
Enabled[Default],
Disabled
Auto
L0sL1
L1
L0s
Disabled[Default]
Disabled[Default]
L1.1
L1.2
L1.1 & L1.2
configure DISABLE – Disables ASPM.
PCI Express L1 Substates settings.
Configure PCIe Speed.
The number of milliseconds reference code
will wait for link to exit Detect state for
enabled ports before assuming there is no
device and potentially disabling the port.
Description
Control the PCI Express Root Port.
Set the ASPM Level: Force L0s – Force all
links to L0s State AUTO – BIOS auto
configure DISABLE – Disables ASPM.
PCI Express L1 Substates settings.