Table 8-6 Hardware Fault With One-Sided Call Of Ob 121, Checksum Error, Second Occurrence - Siemens SIMATIC S7-400H System Manual

Hardware fault with one-sided call of OB 121, checksum error, second occurrence
A 41x-4H CPU reacts to a second occurrence of a hardware fault with a one-sided call of
OB 121 and to checksum errors as set out in the table below, based on the various operating
modes of the 41x-4H CPU.
Table 8-6 Hardware fault with one-sided call of OB 121, checksum error, second occurrence
Error CPU in single mode
Hardware fault OB 121 is executed
with one-sided call
of OB 121
Checksum errors The CPU enters the DEFECTIVE
state if two errors occur within
two successive test cycles.
(Configure the length of the test
cycle in HW Config)
If a second checksum error occurs in single/stand-alone mode after twice the test cycle time
has expired, the CPU reacts as it did on the first occurrence of the error. If a second error
(hardware fault with one-sided call of OB 121, checksum error) occurs in redundant mode
when troubleshooting is finished, the CPU reacts as it did on the first occurrence of the error.
Multiple-bit errors
The CPU changes to TROUBLESHOOTING mode when a multiple-bit error is detected while
the fault-tolerant system is operating in redundant mode. When troubleshooting is finished,
the CPU can automatically link and update itself, and resume redundant operation. At the
transition to troubleshooting mode, the address of the triggering error is reported in the
diagnostics buffer.
Single-bit errors
The CPU calls OB 84 after the detection and elimination of the error.
Influencing the cyclic self-test
SFC 90 "H_CTRL" allows you to influence the scope and execution of the cyclic self-test. For
example, you can remove various test components from the overall test and re-introduce
them. In addition, you can explicitly call specific test components and then initiate processing
of them.
For detailed information on SFC 90 "H_CTRL", refer to the
System and Standard Functions
NOTICE
In a fail-safe system, you are not allowed to disable and then re-enable the cyclic self-tests.
For more details, refer to the
S7-400H
System Manual, 09/2007, A5E00267695-03
System and operating states of the S7-400H
CPU in stand-alone mode
OB 121 is executed
The CPU enters the DEFECTIVE
state if two errors occur within
two successive test cycles.
(Configure the length of the test
cycle in HW Config)
manual.
S7-400F and S7-400FH Programmable Controllers
8.5 Self-test
CPU in redundant mode
The faulty CPU enters the
TROUBLESHOOTING state.
The fault-tolerant system
switches to single mode.
The CPU enters the DEFECTIVE
state if a second error triggered
by the first error event occurs
within the troubleshooting state.
System Software for S7-300/400,
manual.
91