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Mnemonic
ECMP
※
EZCP
EADD
※
ESUB
EMUL
※
EDIV
Float
※
ESQR
Operation
※
2
SIN
※
2
COS
※
2
TAN
※
ASIN
ACOS
※
ATAN
TRD
Clock
TWR
※1： All the instructions are 16bits except the instructions with ※1 which has 32bits. 32bits instructions are added
D in front of its 16bits instruction. Such as ADD (16bits) / DADD (32bits).
※2: These instructions are 32bits, and have no 16bits format.
※3: √ means this series support the instruction.
Appendix 2-3．Special Instructions List
Mnemo
Sort
nic
PLSY
PLSR
PLSF
pulse
PLSA
PLSNE
XT/PLS
NT
PLSMV
※
2
STOP
HSCR
High Speed
HSCW
Counter (HSC)
2
function
※
2
Float compare
2
Float zone compare
※
Float addition
2
2
Float subtraction
※
2
Float multiplication
2
Float division
2
Float square root
Sine
Cosine
tangent
2
Float arcsin
※
2
Float arccos
2
Float arctan
Read RTC data
Set RTC data
Function
※
1
Single
segment
accelerate/decelerate
output
※
1
Relative position multi-segment
pulse control
※
1
Changeable
frequency
output
※
1
Absolute
multi-segment pulse control
change the pulse segment
Save the pulse number in the
register
Pulse stop
※
2
Read high speed counter value
※
Write high speed counter value
Appendix 2 instructions list
Suit Model
XC1 XC2 XC3 XC5 XCM
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
Suitable type
XC
XC
1
2
√
no
pulse
√
√
pulse
√
position
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
XC
XC
XCM
3
5
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
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