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AD1887
Serial Configuration (Index 74h)
R g
R g
R g
R g
R
e
e
e
e
e
g
N
N
N
N
a
a
a
a
m
m
m
m
e
e
e
e
D
D 5 1
D 5 1
D 5 1
D 5 1
5 1
N
a
m
e
N
N m
N m
N m
N m
u
u
u
u
u
m
S
S
S
S
S
e
e
e
e
e
i r
i r
i r
i r
i r
l a
l a
l a
l a
l a
4 7 h
4 7 h
4 7
4 7 h
4 7 h
h
S
S
S
S
S
L
L
L
L
L
O
O
O
O
O
C
C
C
C
o
o
o
o
f n
f n
f n
f n
g i
g i
g i
g i
u
u
u
u
r
r
r
r
t a
t a
t a
t a
o i
o i
o i
o i
n
n
n
n
C
o
f n
g i
u
r
t a
o i
n
Note: This register is not reset when the reset register (Register 00h) is written.
DHWR
Disable Hardware Reset.
REGM0
Master Codec Register Mask.
REGM1
Slave 1 Codec Register Mask.
REGM2
Slave 2 Codec Register Mask.
SLOT16
Enable 16-bit slots.
If your system uses only a single AD1887, you can ignore the register mask bits.
SLOT16 makes all AC Link slots 16 bits in length, formatted into 16 slots.
Miscellaneous Control Bits (Index 76h)
R g
R g
R g
R
R g
e
e
e
e
e
g
N
N
N
N
N
a
a
a
a
a
m
m
m
m
m
e
e
e
e
e
D 5 1
D 5 1
D 5 1
D
D 5 1
5 1
D 4 1
D 4 1
D 4 1
D 4 1
D
4 1
N m
N m
N m
N
N m
u
u
u
u
u
m
6 7 h
6 7
6 7 h
6 7 h
6 7 h
h
M
M c s
M c s
M c s
M c s
i
i
i
i
c s
D
D
D
D
A
A
A
A
C
C
C
C
Z
Z
Z
Z
L
L
L
L
P
P
P
P
M
M
M
M
i
D
A
C
Z
L
P
M
C
C
C
C
C
o
o
o
o
o
n
n
n
n
n
r t
r t
r t
r t
r t
l o
l o
l o
l o
l o
B s t
B s t
B s t
B
B s t
i
i
i
i
i
s t
ARSR
ADC Right Sample Generator Select
0 = SR0 Selected (32h)
1 = SR1 Selected (2Ch)
DRSR
DAC Right Sample Generator Select
0 = SR0 Selected (32h)
1 = SR1 Selected (2Ch)
SRX8D7
Multiply SR1 rate by 8/7.
SRX10D7
Multiply SR1 rate by 10/7. SRX10D7 and SRX8D7 are mutually exclusive; SRX10D7 has priority if both are set.
MODEN
Modem filter enable (left channel only). Change only when DACs are powered down.
ALSR
ADC Left Sample Generator Select
0 = SR0 Selected (32h)
1 = SR1 Selected (2Ch)
DLSR
DAC Left Sample Generator Select
0 = SR0 Selected (32h)
1 = SR1 Selected (2Ch)
DMS
Digital Mono Select
0 = Mixer
1 = Left DAC + Right DAC
DAM
Digital Audio Mode. DAC Outputs bypass analog mixer and sent directly to the codec output.
LPMIX
Low-Power Mixer
DACZ
Zero-fill (vs. repeat) if DAC is starved for data.
D
D 4 1
D 4 1
D 4 1
D 4 1
4 1
D 3 1
D 3 1
D 3 1
D 3 1
D
3 1
D 2 1
D 2 1
D 2 1
D
D 2 1
2 1
T
T
T
T
T
6 1
6 1
6 1
6 1
6 1
R
R
R
R
R
E
E
E
E
E
G
G
G
G
G
M
M
M
M
M
2
2
2
2
2
R
R
R
R
R
E
E
E
E
E
G
G
G
G
G
M
M
M
M
M
1
1
1
1
1
R
R
R
R
R
E
E
E
E
E
G
G
G
G
G
D 3 1
D 3 1
D
D 3 1
D 3 1
3 1
D 2 1
D 2 1
D 2 1
D
D 2 1
2 1
D 1 1
D 1 1
D 1 1
D 1 1
D
1 1
D 0 1
D 0 1
D
D 0 1
D 0 1
0 1
I
I
I
I
X
X
X
X
X X X X X
D M
D
D M
D M
D M
A
A
A
A
M
D S
D S
D S
D S
D
M
M
M
M
S
D
D
D
D
L
L
L
L
S
S
S
S
R
R
R
R
I
X
A
M
D
L
S
R
D 1 1
D 1 1
D 1 1
D 1 1
D
1 1
D 0 1
D
D 0 1
D 0 1
D 0 1
0 1
D9
D
D9
D9
9
D8
D8
D8
D
8
D7
D
D7
D7
D9
D8
D7
M
M
M
M
M
0
0
0
0
0
X X X X X
X X X X X
X X X X X
X X X X X
X X X X X
D
D9
D9
D9
D9
9
D8
D8
D8
D
D8
8
D
D7
D7
D7
D7
7
D6
D6
D6
D6
D
6
X X X X X
A
A
A
A
L
L
L
L
S
S
S
S
R
R
R
R
M D
M D
M D
M
M D
O
O
O
O
D
S
S
S
S
R
R
R
R
X
X
X
X
0 1
0 1
0 1
0 1
A
L
S
R
O
S
R
X
0 1
EN
EN
EN
E
EN
N
D7
D7
D7
D7
D
7
–14–
7
D6
D6
D6
D
6
D5
D
D5
D5
5
D4
D4
D
D4
4
D3
D3
D
D3
3
D2
D2
D
D2
2
D
D1
D1
D1
1
D6
D5
D4
D3
D2
D1
X X X X X
X X X X X
X X X X X
X X X X X
X X X X X
X X X X X
D5
D5
D5
D5
D
5
D4
D4
D4
D4
D
4
D3
D3
D
D3
D3
3
D2
D2
D2
D2
D
2
D1
D1
D1
D1
D
1
S
S
S
S
R
R
R
R
X
X
X
X
8
8
8
8
X X X X X
X X X X X
D
D
D
D
R
R
R
R
S
S
S
S
R
R
R
R
X X X X X
S
R
X
8
D
R
S
R
D7
D
D7
D7
D7
7
D0
D0
D0
D
0
D
D
D
D
e
e
e
e
a f
a f
a f
a f
u
u
u
u
t l
t l
t l
t l
D0
D
e
a f
u
t l
X X X X X
0 7
0 7
0 7 h
0 7 h
0 7 h
0 0
0 0
0 0
0 0
0 0
h
h
D0
D0
D0
D
D0
0
D
D
D
D
D
e
e
e
e
e
a f
a f
a f
a f
a f
u
u
u
u
u
t l
t l
t l
t l
t l
A
A
A
A
R
R
R
R
S
S
S
S
R
R
R
R
4 0 h
4 0
4 0 h
4 0
4 0 h
4 0
4 0
4 0
4 0
h
h
A
R
S
R
4 0
REV. 0
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