3.2
AT91SAM9G10 Block Diagram
Figure 3-1.
JTAGSEL
TDI
TDO
JTAG
TMS
Boundary Scan
TCK
NTRST
RTCK
System Controller
TST
FIQ
IRQ0-IRQ2
DRXD
DTXD
PCK0-PCK3
PLLA
PLLRCA
PLLRCB
PLLB
XIN
OSC
XOUT
WDT
GPBREG
XIN32
OSC
XOUT32
SHDN
WKUP
VDDBU
POR
GNDBU
VDDCORE
POR
NRST
PIOA
MCCK
MCCDA
MCDA0-MCDA3
RXD0
TXD0
SCK0
RTS0
CTS0
RXD1
TXD1
SCK1
RTS1
CTS1
RXD2
TXD2
SCK2
RTS2
CTS2
SPI0_NPCS0
SPI0_NPCS1
SPI0_NPCS2
SPI0_NPCS3
SPI0_MISO
SPI0_MOSI
SPI0_SPCK
SPI1_NPCS10
SPI1_NPCS1
SPI1_NPCS12
SPI1_NPCS3
SPI1_MISO
SPI1_MOSI
SPI1_SPCK
3-4
6479A–ATARM–26-May-09
Block Diagram
ICE
Instruction Cache
16K bytes
I
AIC
ITCM
DBGU
Fast SRAM
PDC
160K bytes
Fast ROM
PMC
32K bytes
PIT
Peripheral
Bridge
RTT
Peripheral
DMA
SHDWC
Controller
RSTC
APB
PIOB
PIOC
MCI
PDC
USART0
PDC
USART1
PDC
USART2
PDC
SPI0
PDC
SPI1
PDC
ARM926EJ-S Core
Data Cache
MMU
16K bytes
TCM
BIU
Interface
D
I
D
DTCM
5-layer
Matrix
PDC
PDC
PDC
AT91SAM9G10-EK Evaluation Board User Guide
ETM
EBI
CompactFlash
NAND Flash
SDRAM
Controller
Static
Memory
Controller
DMA
FIFO
USB Host
FIFO
USB Device
DMA
FIFO
LUT
LCD Controller
SSC0
SSC1
SSC2
Timer Counter
TC0
TC1
TC2
TWI
TSYNC
TCLK
TPS0-TPS2
TPK0-TPK15
BMS
D0-D15
A0/NBS0
A1/NBS2/NWR2
A2-A15/A18-A21
A22/REG
A16/BA0
A17/BA1
NCS0
NCS1/SDCS
NCS2
NCS3/NANDCS
NRD/CFOE
NWR0/NWE/CFWE
NWR1/NBS1/CFIOR
NWR3/NBS3/CFIOW
SDCK
SDCKE
RAS-CAS
SDWE
SDA10
NWAIT
A23-A24
A25/CFRNW
NCS4/CFCS0
NCS5/CFCS1
CFCE1
CFCE2
NCS6/NANDOE
NCS7/NANDWE
D16-D31
HDMA
HDPA
HDMB
HDPB
DDM
DDP
LCDD0-LCDD23
LCDVSYNC
LCDHSYNC
LCDDOTCK
LCDDEN
LCDCC
TF0
TK0
TD0
RD0
RK0
RF0
TF1
TK1
TD1
RD1
RK1
RF1
TF2
TK2
TD2
RD2
RK2
RF2
TCLK0
TCLK1
TCLK2
TIOA0
TIOB0
TIOA1
TIOB1
TIOA2
TIOB2
TWD
TWCK
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