Vtex1629_Get_Sample_Clock_Source - VTI Instruments EX1629 User Manual

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F P
UNCTION ROTOTYPE
ViStatus vtex1629_get_sample_clock_source (ViSession vi, ViPInt32 sampleClockMode, ViPInt32 inLine,
ViPInt32 outLine);
F P
UNCTION ARAMETERS
vi = contains a session handle to the instrument. This handle is obtained by the function and remains valid until the
session is closed.
sampleClockMode = an integer output value that indicates whether the EX1629 is operating as a master or slave.
Valid return values: VTEX1629_SAMP_CLK_MODE_MASTER or VTEX1629_SAMP_CLK_MODE_SLAVE
inLine = an integer output value that indicates the trigger bus line configured to listen for sample clock events.
Valid return values: VTEX1629_LXI_LINE_ZERO, VTEX1629_LXI_LINE_FOUR, or
VTEX1629_LXI_LINE_NONE.
outLine = an integer output value that indicates the trigger bus line configured to output sample clock events. Valid
return values: VTEX1629_LXI_LINE_ZERO to VTEX1629_LXI_LINE_SEVEN, VTEX1629_LXI_LINE_NONE.
D I R V
ATA TEM ESET ALUE
Not applicable to this function.
D
ESCRIPTION
This function queries and returns the configured sample clock source.
The sampleClockMode parameter indicates whether the EX1629 is configured as a master device that outputs a
sample clock for itself and other devices or as a slave device that receives its sample clock from another device.
When operating in standalone mode, sampleClockMode should be configured as a master.
The inLine parameter indicates the LXI line that should be used as the sample clock input. This value is applicable
regardless of whether the device is configured as a master or a slave. When inLine is set to
VTEX1629_LXI_LINE_NONE, the internal sample clock line is used.
The outLine parameter indicates the LXI line that should be used as the sample clock output. This value is only
applicable when the device is configured as a master. When outLine is set to VTEX1629_LXI_LINE_NONE, the
sample clock is output on the internal sample clock line.
Decimal Hex
Value Value
0 0x00 VTEX1629_LXI_LINE_ZERO
4 0x04 VTEX1629_LXI_LINE_FOUR
8 0x08 VTEX1629_LXI_LINE_NONE
When in master mode, the inLine and outLine parameters may be the same or they may be different. One case
where they would be different is if the master is outputting the sample clock on one LXI line and receiving it back in
from a LXI Trigger Bus hub on another line. When in standalone mode, inLine and outLine will always be the
same.
E
XAMPLE
ViSession instrumentHandle;
ViStatus status;
ViInt32 sample_clock_mode;
ViInt32 in_line, out_line;
...
status = vtex1629_get_sample_clock_source(instrumentHandle,
178

vtex1629_get_sample_clock_source

#define Symbol
&samp_clock_mode,
&in_line,
&out_line);
inLine/outLine
Description
LXI LINE 0
LXI LINE 4
None
EX1629 Command Set