Table of Contents
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Instruc-
Mne-
Operand
tions
monics
Memory/ SET1
mem.bit
Bit
fmem.bit
Manipu-
pmem.@L
lation
@H+mem.bit
CLR1
mem.bit
fmem.bit
pmem.@L
@H+mem.bit
SKT
mem.bit
fmem.bit
pmem.@L
@H+mem.bit
SKF
mem.bit
fmem.bit
pmem.@L
@H+mem.bit
SKTCLR fmem.bit
pmem.@L
@H+mem.bit
AND1
CY,fmem.bit
CY,pmem.@L
CY,@H+mem.bit
OR1
CY,fmem.bit
CY,pmem.@L
CY,@H+mem.bit
XOR1
CY,fmem.bit
CY,pmem.@L
CY,@H+mem.bit
Branch
BR
addr
!addr
$addr
BRCB
!caddr
42
Ma-
chine
Bytes
Operation
Cyc-
les
(mem.bit) ← 1
2
2
(fmem.bit) ← 1
2
2
2
2
(pmem
+ L
7-2
3-2
.bit) ← 1
2
2
(H + mem
3-0
(mem.bit) ← 0
2
2
(fmem.bit) ← 0
2
2
2
2
(pmem
+ L
7-2
3-2
.bit) ← 0
2
2
(H+mem
3-0
2
2+S
Skip if (mem.bit) = 1
2
2+S
Skip if (fmem.bit) = 1
2
2+S
Skip if (pmem
7-2
2
2+S
Skip if (H + mem
2
2+S
Skip if (mem.bit) = 0
2
2+S
Skip if (fmem.bit) = 0
2
2+S
Skip if (pmem
7-2
2
2+S
Skip if (H + mem
2
2+S
Skip if (fmem.bit) = 1 and clear
2
2+S
Skip if (pmem
7-2
(L
)) = 1 and clear
1-0
2
2+S
Skip if (H+mem
3-0
∧
CY ← CY
2
2
(fmem.bit)
∧
CY ← CY
2
2
(pmem
∧
CY ← CY
2
2
(H+mem
∨
CY ← CY
2
2
(fmem.bit)
CY ← CY ∨ (pmem
2
2
∨
CY ← CY
2
2
(H+mem
∨
CY ← CY
2
2
(fmem.bit)
CY ← CY ∨ (pmem
2
2
∨
CY ← CY
2
2
(H+mem
← addr
—
—
PC
13-0
(The most suitable instruction
is selectable from among BR
!addr, BRCB !caddr, and BR
$addr depending on the
assembler.)
← addr
3
3
PC
13-0
← addr
1
2
PC
13-0
← PC
2
2
PC
13-0
13,12
Ad-
dress-
ing
Area
*3
*4
)) ← 1
.bit(L
*5
1-0
*1
*3
*4
)) ← 0
.bit(L
*5
1-0
*1
*3
*4
+L
.bit (L
)) = 1
*5
3-2
1-0
.bit) = 1
*1
3-0
*3
*4
+L
.bit (L
)) = 0
*5
3-2
1-0
.bit) = 0
*1
3-0
*4
+L
.bit
*5
3-2
*1
.bit) = 1 and clear
*4
+L
.bit(L
))
*5
7-2
3-2
1-0
.bit)
*1
3-0
*4
*5
+L
.bit (L
))
7-2
3-2
1-0
.bit)
*1
3-0
*4
*5
+L
.bit (L
))
7-2
3-2
1-0
.bit)
*1
3-0
*6
*6
*7
+caddr
*8
11-0
µ PD75512
Skip
Conditions
(mem.bit) = 1
(fmem.bit) = 1
(pmem.@L) = 1
(@H+mem.bit) = 1
(mem.bit) = 0
(fmem.bit) = 0
(pmem.@L) = 0
(@H+mem.bit) = 0
(fmem.bit) = 1
(pmem.@L) = 1
(@H+mem.bit) = 1
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