System Configuration - Xilinx MicroBlaze Spartan-3E 1600E Edition Getting Started

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Table 2-1: Reference System Address Map

System Configuration

This reference system runs off a reference clock frequency of 50 MHz from the auxiliary
oscillator on the board. The PLB bus, Ethernet MAC, and the MicroBlaze processor run at
50 MHz, while the DDR runs at 100 MHz.
MicroBlaze Processor Configuration
The MicroBlaze processor is configured with with Memory Management Unit (MMU)
enabled and also the I-cache and D-cache enabled. The MMU is enabled by setting the
MicroBlaze parameter C_USE_MMU to 3. This parameter implements the MMU in Virtual
mode. In Virtual mode, the MMU controls effective-address to physical-address mapping
and supports memory protection. Virtual mode provides greater control over memory
protection. Protection and relocation enable system software to support multitasking. This
capability gives the appearance of simultaneous or near-simultaneous execution of
multiple programs.
A cache size of 8KB is set for both the instruction cache (I-cache) and the data cache (D-
cache). The cacheable block of main memory resides between 0x20000000 and
0x21FFFFFF and are accessed via the XCL Port Interface Modules (PIM) of the Multi-
ported Memory Controller (MPMC).
More information about the MMU, the Instruction Cache and Data Cache can be found in
the MicroBlaze Processor Reference Guide.
XPS Ethernetlite Configuration
The BlueCat Linux RTOS requires that the XPS Ethernet has the interrupts be set to on. In
the BlueCat Linux demonstration, the Ethernet MAC can run at 10 Mb/s or 100 Mb/s,
depending on the attached network. No other special settings are needed.
XPS MCH EMC Configuration
The XPS MCH EMC memory controller is connected to an external Intel StrataFlash
PROM, which is used to store the hardware configuration bitstream and bootloader
application, as well as the BlueCat Linux kernel image file.
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Getting Started with the MicroBlaze Development Kit - Spartan-3E 1600E Edition
UG258 (v1.3) November 30, 2007
Instance
DDR_SDRAM
Ethernet_MAC
xps_timer_1
xps_intc_0
LEDs_6Bit
DIP_Switches_4Bit
Buttons_3Bit
LEDs_1Bit
xps_bram_if_cntlr_1
Peripheral Base Address
mpmc
0x20000000
xps_ethernetlite
0x40C00000
xps_timer
0x41C00000
xps_intc
0x41200000
xps_gpio
0x42000000
xps_gpio
0x42400000
xps_gpio
0x42600000
xps_gpio
0x42800000
xps_bram
0x41A08000
Hardware Specifics
High Address
0x23FFFFFF
0x40C0FFFF
0x41C0FFFF
0x4120FFFF
0x4200FFFF
0x4240FFFF
0x4260FFFF
0x4280FFFF
0x41A09FFF
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