Table Of Contents - Analog Devices ADXL180 iMEMS Manual

Configurable, high g, accelerometer
Table of Contents

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ADXL180

TABLE OF CONTENTS

Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 3
Specifications ..................................................................................... 4
Absolute Maximum Ratings ............................................................ 7
ESD Caution .................................................................................. 7
Pin Configuration and Function Descriptions ............................. 8
Terminology ...................................................................................... 9
Theory of Operation ...................................................................... 10
Overview ...................................................................................... 10
Acceleration Sensor .................................................................... 10
Signal Processing ........................................................................ 11
Digital Communications State Machine ................................. 11
2-Wire Current Modulated Interface ....................................... 11
Programmed Memory and Configurability ............................ 11
Physical Interface ............................................................................ 13
Application Circuit ..................................................................... 13
Current Modulation ................................................................... 13
Manchester Data Encoding ....................................................... 14
............................................................... 14
DD
Communications Timing and Bus Topologies ........................... 15
Asynchronous Communication ............................................... 15
Synchronous Communication .................................................. 15
Data Frame Definition ................................................................... 21
Data Frame Transmission Format ............................................ 21
Data Frame Configuration Options ......................................... 21
Acceleration Data Coding ......................................................... 23
State Vector Coding ................................................................... 24
State Vector Descriptions .......................................................... 24
Transmission Error Detection Options ................................... 25
ADXL180 State Machine ........................................................... 26
Phase 1: Power-on-Reset Initialization .................................... 26
Phase 2: Device Data Transmission ......................................... 26
Phase 2: Mode Description ....................................................... 28
............................................ 14
Rev. 0 | Page 2 of 56
Phase 3: Self-Test Diagnostic .................................................... 35
Phase 4: Auto-Zero Initialization ............................................. 38
Phase 5: Normal Operation ...................................................... 38
Signal Range and Filtering ............................................................ 39
Transfer Function Overview ..................................................... 39
Range ............................................................................................ 39
Three-Pole Bessel Filter ............................................................. 39
Auto-Zero Operation ................................................................. 39
Error Detection ............................................................................... 41
Overview ..................................................................................... 41
Bit Error ....................................................................................... 41
Self-Test Error ............................................................................. 42
Offset Error/Offset Drift Monitoring ...................................... 42
Voltage Regulator Monitor Reset Operation .......................... 42
Test and Diagnostic Tools ............................................................. 43
V
Signal Chain Input Test Pin .............................................. 43
V
Analog Signal Chain Output Test Pin ............................ 43
Configuration Specification .......................................................... 44
Overview ..................................................................................... 44
Protocol........................................................................................ 46
Configuration and User Data Registers .................................. 48
Configuration Mode Exit .......................................................... 48
Registers ....................................................................................... 48
Configuration/User Register OTP Parity ................................ 49
Configuration Mode Error Reporting ..................................... 49
Configuration Register Reference ................................................ 50
UD[7:0] User Data Bits .............................................................. 51
UD8 Configuration Bit .............................................................. 51
BDE .............................................................................................. 51
SCOE ............................................................................................ 51
FDLY ............................................................................................ 51
ADME .......................................................................................... 51
STI ................................................................................................ 51
FC[1:0] ......................................................................................... 51

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