Silicon Laboratories C8051T620/2-DK User Manual page 14

C8051T620/2-DK
Table 2 lists the port pins and headers corresponding to the switches, LEDs, and potentiometer.
Description
Switch
Switch
RESET
Green LED labeled "LED1"
Green LED labeled "LED2"
Red LED labeled "PWR"
Red LED labeled "VPP"
Green LED labeled "RUN"
Red LED labeled "STOP"
Orange LED labeled "DEBUG PWR"
Green LED labeled "USB ACTIVE"
Potentiometer
7.3. Power Supply Headers (J6 and J7)
The main power supply of the motherboard, which is used to power the daughter board, can be provided by either
the USB Debug Adapter's on-chip voltage regulator, the CP2103 USB-to-UART bridge's on-chip voltage regulator,
P3 and its associated circuitry, or an external voltage applied to the VDD_EXT connection on J1. To select a power
supply, place a shorting block on J6 across the appropriate pin pair, as shown in Figure 12. To connect the main
power supply to an attached daughter board, place a shorting block across J7.
Notes:
1. Only one shorting block should be placed on J6 at a time.
2. To use the CP2103's voltage regulator as the board's power supply, a USB cable must be connected to P4, and the USB
ACTIVE LED (D2) must be on.
3. To use the USB Debug Adapter's voltage regulator as the board's power supply, a USB cable must be connected to P5,
and the DEBUG PWR LED (D12) must be on.
J7
VDD_T620 VDD_PWR
J6
+3VD
VDD_EXT
VDD_PWR
VDD_DEBUG
VDD_COMM
+3.3V Regulator Power
(From P3)
Figure 12. J6 and J7 Shorting Block Configuration for Power Options
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Table 2. Motherboard I/O Descriptions
Component Name
SW1
SW2
SW3
D1
D2
D4
D7
D10
D11
D12
D13
R8
J7
VDD_T620 VDD_PWR
J6
+3VD
VDD_EXT
VDD_PWR
VDD_DEBUG
VDD_COMM
CP2103 Regulator Power
(From USB at P4)
Rev. 0.4
I/O
Daughter Card's P0.1
Daughter Card's P2.0
Daughter Card's P1.0
Daughter Card's P2.1
Daughter Card's RST/C2CK
Daughter Card's P0.6
Daughter Card's P2.2
Daughter Card's P1.2
Daughter Card's P2.3
Daughter Card's VDD
Daughter Card's VPP pin
(See "VPP Pin Sharing" on
page 16)
Debug Adapter Signal
Debug Adapter Signal
Debug Adapter Signal
U2 CP2103's SUSPEND
Daughter Card's P2.5
J7
VDD_T620 VDD_PWR
J6
+3VD
VDD_EXT
VDD_PWR
VDD_DEBUG
VDD_COMM
Debug Circuit Power
(From USB at P5)
Header
J9 [2-4]
J9 [4-6]
J9 [1-3]
J9 [3-5]
None
J10 [2-4]
J10 [4-6]
J10 [1-3]
J10 [3-5]
J6, J7
J15
None
None
None
None
J12
J7
VDD_T620 VDD_PWR
J6
+3VD
VDD_EXT
VDD_PWR
VDD_DEBUG
VDD_COMM
External Power Source
(From J1 Connector)