Switching Diagram Principles - Siemens SPC3 Hardware Description

7.1.3 Switching Diagram Principles

CLK
W R
RD
INT 0
Port 0
80C32/
C501
ALE
Port 2
Reset
CLK
W R
RD
INT 0
80C32
20/16M Hz
ALE
A / D 7...0
Port 0
AB 15...8
Port 2
PSEN
Reset
SPC3 Hardware Description
Copyright (C) Siemens AG 2003 All rights reserved.
SPC3
Low Cost System with 80C32
A / D 7...0
AB 15...8
80C32 System with Ext. Memory (C32-Mode)
Address
Latch
EPROM RAM
64kB 32kB
RD W R
PROFIBUS Interface Center
(0000 00XX BIN)
(0000 00XX BIN)
AB 15...0
Address
Decoder
V1.3
Pulse Generator
48MHz
12/24 MHz
Divider :2/4
XW R
XRD
X/INT
DB 7..0
Data
DB 7..0
Address Latch
SPC3
AB 7..0
Address
decoder
AB8
AB9
AB10
Mode
1K 1K 1K
3K3
GND VDD
Pulse Generator
48 MHz
12/24 MHz
Scaler:2/4
XW R
XRD
X/INT
DB 7..0
Data
DB 7..0
Address Latch
SPC3
AB 7....0
Address-
decoder
AB8
AB9
AB10
Mode
1K 1K 1K 3K3
GND VDD
DIVIDER
RT S
T xD
RxD
XCT S
1K
GND
SPC3
Reset
DIVIDER
RT S
T xD
RxD
XCT S
1K
GND
SPC3
Reset
Page 39
2003/04